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US Patent 12125819 Die on die bonding structure

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
0
Date Filed
August 9, 2022
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Date of Patent
October 22, 2024
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Patent Application Number
17883999
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Patent Citations
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US Patent 9281254 Methods of forming integrated circuit package
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US Patent 9299649 3D packages and methods for forming the same
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US Patent 9372206 Testing of semiconductor chips with microbumps
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US Patent 9425126 Dummy structure for chip-on-wafer-on-substrate
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US Patent 9443783 3DIC stacking device and method of manufacture
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US Patent 9461018 Fan-out PoP structure with inconsecutive polymer layer
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US Patent 9496189 Stacked semiconductor devices and methods of forming same
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US Patent 9735131 Multi-stack package-on-package structures
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US Patent 9666502 Discrete polymer in fan-out packages
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US Patent 11410984 Three dimensional integrated circuit with lateral connection layer
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•••
Patent Inventor Names
Ming-Fa Chen
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Chao-Wen Shih
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Sung-Feng Yeh
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
12125819
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Patent Primary Examiner
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Dale E Page
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CPC Code
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H01L 2224/2784
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H01L 2224/0557
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H01L 21/30625
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H01L 25/0657
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