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Jeffrey A. Gaffin
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Edits on 15 Dec, 2021
"Remove inverse infobox"
Golden AI
edited on 15 Dec, 2021
Edits made to:
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Infobox
Patent primary examiner of
US Patent 7089241 Classifier tuning based on data similarities
US Patent 7194481 Computer based matching system for party and counterparty exchanges
US Patent 7793174 Semiconductor apparatus and test method therefor
US Patent 7793186 System and method for increasing the extent of built-in self-testing of memory and circuitry
US Patent 7802155 Non-volatile memory device manufacturing process testing systems and methods thereof
US Patent 7818646 Expectation based event verification
US Patent 7827454 Semiconductor device
US Patent 7827455 System and method for detecting glitches on a high-speed interface
US Patent 7836329 Communication link protocol optimized for storage architectures
US Patent 7836372 Memory controller with loopback test interface
US Patent 7840858 Detection apparatus and test apparatus
US Patent 7840861 Scan-based testing of devices implementing a test clock control structure (“TCCS”)
US Patent 7844867 Combined processor access and built in self test in hierarchical memory systems
US Patent 7848193 Disc device
US Patent 7849370 Jitter producing circuitry and methods
US Patent 7853838 Method and apparatus for handling failure in address line
US Patent 7853850 Testing hardware components to detect hardware failures
US Patent 7861129 Integrated circuit for writing and reading registers distributed across a semiconductor chip
US Patent 7865786 Scanned memory testing of multi-port memory arrays
US Patent 7865959 Method and system for management of access information
US Patent 7870444 System and method for measuring and correcting data lane skews
US Patent 7870445 System and method for measuring and depicting performance of a serial communications link
US Patent 7870446 Information processing apparatus and nonvolatile semiconductor memory drive
US Patent 7870448 In system diagnostics through scan matrix
US Patent 7870462 Methods and devices for randomizing burst errors
US Patent 7873889 JTAG bus communication method and apparatus
US Patent 7873891 Programmable voltage divider
US Patent 7877652 Detection circuit and method for AC coupled circuitry
US Patent 7877655 Method for performing a test case with a LBIST engine on an integrated circuit, integrated circuit and method for specifying an integrated circuit
US Patent 7882408 Real time feedback compensation of programmable logic memory
US Patent 7882410 Launch-on-shift support for on-chip-clocking
US Patent 7882411 Shift register, data line driving circuit, scanning line driving circuit, electro-optical device, and electronic apparatus
US Patent 7886207 Integrated circuit testing using segmented scan chains
US Patent 7890817 Protective system for an installation and a method for checking a protective system
US Patent 7890822 Tester input/output sharing
US Patent 7895480 Method for testing the error ratio BER of a device according to confidence level, test time and selectivity
US Patent 7895486 Semiconductor device test system with test interface means
US Patent 7895490 Method and system for testing an electronic circuit to identify multiple defects
US Patent 7895491 Integrated circuit with low-power built-in self-test logic
US Patent 7895493 Bus failure management method and system
US Patent 7933848 Support vector regression for censored data
US Patent 7937634 Circuit and method providing dynamic scan chain partitioning
US Patent 7945526 Method of organizing and presenting data in a table
US Patent 7945829 Semiconductor integrated circuit
US Patent 7949616 Telepresence by human-assisted remote controlled devices and robots
US Patent 7949623 Communication method
US Patent 7949907 Method and device for data communication
US Patent 7949911 Method for testing storage apparatus and system thereof
US Patent 7949917 Maintaining data coherency in multi-clock systems
US Patent 7953681 System and method of forecasting print job related demand
US Patent 7953688 Method and system for facilitating a compliance audit using a rule set
US Patent 7954018 Analysis techniques for multi-level memory
US Patent 7958076 System and methods for managing rules and detecting reciprocal dependencies
US Patent 7958411 Memory system and control method thereof
US Patent 7958415 Semiconductor integrated circuit and method of detecting fail path thereof
US Patent 7958418 Circuit arrangement, electronic mechanism, electrical turn out and procedures for the operation of one circuit arrangement
US Patent 7958421 Single-pass, concurrent-validation methods for generating test patterns for sequential circuits
US Patent 7962432 Analyzing information technology systems using collaborative intelligence data anonimity
US Patent 7962805 System and method for preventing a race condition
US Patent 7962811 Scan chain disable function for power saving
US Patent 7962819 Test mode soft reset circuitry and methods
US Patent 7962820 Fault diagnosis of compressed test responses
US Patent 7966273 Predicting formation fluid property through downhole fluid analysis using artificial neural network
US Patent 7966279 Data validation using signatures and sampling
US Patent 7966529 System and method for testing memory blocks in an SOC design
US Patent 7966532 Method for selectively retrieving column redundancy data in memory device
US Patent 7966533 Register device and methods for using such
US Patent 7970716 Method for expressing emotion and intention in remote interaction and real emotion system thereof
US Patent 7970723 Defining extensible expression behavior in a rules system
US Patent 7970724 Execution of a canonical rules based agent
US Patent 7971019 System and method for controlling access to multiple physical media libraries
US Patent 7971118 Conversion device, conversion method, program, and recording medium
US Patent 7971119 System and method for defect-based scan analysis
US Patent 7974936 Structural formula display system, method, and program storage medium storing program thereof
US Patent 7975191 Nonvolatile memory device comprising a programming and deletion checking option
US Patent 7975192 Reading memory cells using multiple thresholds
US Patent 7975197 On-chip scan clock generator for ASIC testing
US Patent 7979362 Interactive data mining system
US Patent 7979364 Learning control apparatus, learning control method, and computer program
US Patent 7979369 Classification of digital content by using aggregate scoring
US Patent 7979370 Neural network for electronic search applications
US Patent 7979765 Generating device, generating method, program and recording medium
US Patent 7983996 Method and apparatus for human behavior modeling in adaptive training
US Patent 7984002 Automatic source code generation for computing probabilities of variables in belief networks
US Patent 7984006 Learning a user's activity preferences from GPS traces and known nearby venues
US Patent 7984007 Proactive problem resolution system, method of proactive problem resolution and program product therefor
US Patent 7984008 Evaluating the predictability of a pass phrase
US Patent 7984009 Apparatus for selecting motor controller
US Patent 7984011 Policy change processing program, policy change processing method, policy change processing apparatus
US Patent 7984012 Graph embedding techniques
US Patent 7984351 Data transfer device and method thereof
US Patent 7984353 Test apparatus, test vector generate unit, test method, program, and recording medium
US Patent 7987143 Methods and systems for multi-objective evolutionary algorithm based engineering desgin optimization
US Patent 7987147 Information processing apparatus, information processing method, and program based on operator probability using sensors
US Patent 7987149 Configuration mapping using a multi-dimensional rule space and rule consolidation
US Patent 7987150 Method and apparatus for automated rule-based sourcing of substrate microfabrication defects
US Patent 7987399 System and method for electronic device development
US Patent 7987401 System and method for generating self-synchronized launch of last shift capture pulses using on-chip phase locked loop for at-speed scan testing
US Patent 7991602 Agent simulation development environment
US Patent 7991709 Method and apparatus for structuring documents utilizing recognition of an ordered sequence of identifiers
US Patent 7991710 Intrusive feature classification model
US Patent 7991713 Method for solving minimax and linear programming problems
US Patent 7991714 Cognitive memory and auto-associative neural network based search engine for computer and network located images and photographs
US Patent 7991716 Comprehensive identity protection system
US Patent 7991719 Information processing method and apparatus, and image pickup device
US Patent 7991721 Differential availability determination and notification
US Patent 7991723 Data pattern analysis using optimized deterministic finite automaton
US Patent 7991724 Method and a computer program product for providing a response to a statement of a user
US Patent 7991725 Intelligent reputation attribution platform
US Patent 7991727 Mechanism to abstract fact types from a rule engine
US Patent 7992057 Write-once type optical disc, and method and apparatus for managing defective areas on write-once type optical disc
US Patent 7992062 Logic device and method supporting scan test
US Patent 7992063 Control circuit for releasing residual charges
US Patent 7996336 System and program storage device of object classification utilizing optimized boolean expressions
US Patent 7996340 Method and system for L
US Patent 7996344 Multi-objective evolutionary algorithm based engineering design optimization
US Patent 7996349 Methods and apparatus for computing graph similarity via sequence similarity
US Patent 7996350 Virtual intelligent fabric
US Patent 7996351 Automated estimation of a country where a client computer is configured to operate
US Patent 7996353 Policy-based management system with automatic policy selection and creation capabilities by using singular value decomposition technique
US Patent 8001061 First and second unsupervised learning processes combined using a supervised learning apparatus
US Patent 8001063 Method and apparatus for reward-based learning of improved policies for management of a plurality of application environments supported by a data processing system
US Patent 8001066 Systems and methods for improving recognition results via user-augmentation of a database
US Patent 8001067 Method for substituting an electronic emulation of the human brain into an application to replace a human
US Patent 8001432 Uninitialized memory detection using error correction codes and built-in self test
US Patent 8005766 Apparatus, method and computer program product providing a hierarchical approach to command-control tasks using a brain-computer interface
US Patent 8005767 System and method of classifying events
US Patent 8005768 Multimedia file reproducing apparatus and method
US Patent 8005770 Parallel generation of a bayesian network
US Patent 8005774 Determining a relevance function based on a query error derived using a structured output learning technique
US Patent 8005778 Modular system for optimizing knowledge yield in the digital workplace
US Patent 8005779 System and method for designing a workflow
US Patent 8005783 Method and system for optimizing reuse of artifacts based on assessment and classification
US Patent 8006144 Memory testing
US Patent 8006150 Circuit and method for increasing scan cell observability of response compactors
US Patent 8010394 System and method to facilitate yearly inventory forecasting for network-based entities
US Patent 8010467 Active element machine computation
US Patent 8010469 Systems and methods for processing data flows
US Patent 8010470 Method of and apparatus for automated behavior prediction
US Patent 8010473 Prime indexing and/or other related operations
US Patent 8010853 Semiconductor storage device and memory test circuit
US Patent 8010856 Methods for analyzing scan chains, and for determining numbers or locations of hold time faults in scan chains
Edits on 8 Dec, 2021
Golden AI
edited on 8 Dec, 2021
Edits made to:
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+1
properties)
Infobox
Patent primary examiner of
US Patent 8010856 Methods for analyzing scan chains, and for determining numbers or locations of hold time faults in scan chains
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8010853 Semiconductor storage device and memory test circuit
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8010473 Prime indexing and/or other related operations
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8010467 Active element machine computation
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8010394 System and method to facilitate yearly inventory forecasting for network-based entities
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8006150 Circuit and method for increasing scan cell observability of response compactors
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8006144 Memory testing
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8005770 Parallel generation of a bayesian network
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8005783 Method and system for optimizing reuse of artifacts based on assessment and classification
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8005768 Multimedia file reproducing apparatus and method
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8005779 System and method for designing a workflow
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8005774 Determining a relevance function based on a query error derived using a structured output learning technique
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8005766 Apparatus, method and computer program product providing a hierarchical approach to command-control tasks using a brain-computer interface
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8005778 Modular system for optimizing knowledge yield in the digital workplace
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8005767 System and method of classifying events
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8001432 Uninitialized memory detection using error correction codes and built-in self test
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8001067 Method for substituting an electronic emulation of the human brain into an application to replace a human
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8001066 Systems and methods for improving recognition results via user-augmentation of a database
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8001063 Method and apparatus for reward-based learning of improved policies for management of a plurality of application environments supported by a data processing system
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