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Julio J Maldonado

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Edits on 14 Dec, 2021
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Golden AI
edited on 14 Dec, 2021
Edits made to:
Infobox (-113 properties)
Infobox
Patent primary examiner of
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US Patent 11183586 Cascode transistor device
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US Patent 7602010 Multi-bit multi-level non-volatile memory device and methods of operating and fabricating the same
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US Patent 7608522 Method for fabricating a hybrid orientation substrate
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US Patent 7618896 Semiconductor die package including multiple dies and a common node structure
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US Patent 7622777 Semiconductor device and method for fabricating the same
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US Patent 7645646 Manufacture of electronic devices comprising thin-film circuit elements
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US Patent 7648903 Modular bonding pad structure and method
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US Patent 7666748 Method of forming amorphous source/drain extensions
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US Patent 7670887 Field-effect transistors with weakly coupled layered inorganic semiconductors
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US Patent 7670952 Method of manufacturing metal silicide contacts
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US Patent 7679153 Sealed surface acoustic wave element package
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US Patent 7682932 Method for fabricating a hybrid orientation substrate
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US Patent 7687306 CMOS image sensor and method for manufacturing the same
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US Patent 7687336 Method of manufacturing a MOSFET structure
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US Patent 7687404 Method for manufacturing display device
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US Patent 7687884 Manufacture of solid state capacitors
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US Patent 7687889 Organic electroluminescent display device having electrical communication between conducting layer and cathode layer
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US Patent 7691655 Method of manufacturing semiconductor optical device
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US Patent 7691661 Method of fabricating a surface probing device
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US Patent 7691672 Substrate treating method and method of manufacturing semiconductor apparatus
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US Patent 7691679 Pre-plated leadframe having enhanced encapsulation adhesion
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US Patent 7691735 Method for manufacturing metal chips by plasma from a layer comprising several elements
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US Patent 7692188 Display device and manufacturing method thereof
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US Patent 7696014 Method for breaking adhesive film mounted on back of wafer
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US Patent 7709278 Method of making PCB circuit modification from multiple to individual chip enable signals
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US Patent 7713874 Periodic plasma annealing in an ALD-type process
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US Patent 7714384 Castellated gate MOSFET device capable of fully-depleted operation
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US Patent 7723179 Light emitting device and method for manufacturing the same
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US Patent 7745940 Forming ultra dense 3-D interconnect structures
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US Patent 7749798 Optimized photodiode process for improved transfer gate leakage
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US Patent 7749901 Method for forming a tapered via of a semiconductor device
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US Patent 7749903 Gate patterning scheme with self aligned independent gate etch
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US Patent 7754585 Method of heat treatment of silicon wafer doped with boron
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US Patent 7755143 Semiconductor device
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US Patent 7759204 Process for high voltage superjunction termination
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US Patent 7759221 Methods for packaging microelectronic devices and microelectronic devices formed using such methods
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US Patent 7763487 Integrated differential pressure sensor and manufacturing process thereof
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US Patent 7767516 Semiconductor device, manufacturing method thereof, and manufacturing method of antenna
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US Patent 7767591 Method and device for producing electronic components
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US Patent 7768075 Semiconductor die packages using thin dies and metal substrates
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US Patent 7772040 Manufacturing method of semiconductor device, adhesive sheet used therein, and semiconductor device obtained thereby
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US Patent 7776757 Method of fabricating high-k metal gate devices
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US Patent 7781255 Donor sheet and method of manufacturing donor sheet and organic thin film transistor
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US Patent 7781351 Methods for producing low-k carbon doped oxide films with low residual stress
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US Patent 7786013 Method of fabricating semiconductor device
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US Patent 7790478 Manufacturing method of semiconductor integrated circuit device
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US Patent 7790493 Wafer-level, polymer-based encapsulation for microstructure devices
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US Patent 7790571 SOQ substrate and method of manufacturing SOQ substrate
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US Patent 7790584 Method of growing semi-polar nitride single crystal thin film and method of manufacturing nitride semiconductor light emitting diode using the same
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US Patent 7791183 Universal low cost MEM package
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US Patent 7800185 Closed trench MOSFET with floating trench rings as termination
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US Patent 7803688 Capacitive substrate and method of making same
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US Patent 7807479 Method and apparatus for improving force control in wafer scribing
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US Patent 7820515 Nonvolatile semiconductor memory element excellent in charge retention properties and process for producing the same
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US Patent 7820550 Negative tone double patterning method
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US Patent 7824930 Method of manufacturing substrate, substrate manufacturing system, and method of manufacturing display
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US Patent 7825025 Method and system for improved nickel silicide
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US Patent 7825026 Method for processing copper surface, method for forming copper pattern wiring and semiconductor device manufactured using such method
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US Patent 7829431 Method for manufacturing a SOI with plurality of single crystal substrates
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US Patent 7833825 Solution-based deposition process for metal chalcogenides
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US Patent 7833839 Method for decreasing surface delamination of gel-type thermal interface material by management of the material cure temperature
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US Patent 7833855 Methods of producing integrated circuit devices utilizing tantalum amine derivatives
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US Patent 7838955 Image sensor and method for manufacturing the same
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US Patent 7842609 Method for manufacturing semiconductor device
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US Patent 7846849 Frequency tripling using spacer mask having interposed regions
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US Patent 7851372 Composition for removing an insulation material, method of removing an insulation layer and method of recycling a substrate using the same
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US Patent 7858489 Method for manufacturing semiconductor device capable of increasing current drivability of PMOS transistor
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US Patent 7863085 Organic thin film transistor, method of manufacturing the same, and biosensor using the transistor
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US Patent 7863684 High integrated semiconductor memory device
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US Patent 7863694 Organic thin film transistors
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US Patent 7867817 Method for manufacturing a wafer level package
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US Patent 7867839 Method to reduce threshold voltage (Vt) in silicon germanium (SiGe), high-k dielectric-metal gate, p-type metal oxide semiconductor field effect transistors
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US Patent 7867880 Metal precursors for low temperature deposition and methods of forming a metal thin layer and manufacturing a phase-change memory device using the metal precursors
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US Patent 7872255 Organic light-emitting device
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US Patent 7872261 Transparent thin film transistor and image display unit
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US Patent 7883954 Self-aligned epitaxially grown bipolar transistor
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US Patent 7883981 Method for manufacturing flash memory device
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US Patent 7892867 Method for manufacturing flexible display panel
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US Patent 7892886 Semiconductor chip and semiconductor device, and method of manufacturing the same
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US Patent 7892908 Integration scheme for changing crystal orientation in hybrid orientation technology (HOT) using direct silicon bonded (DSB) substrates
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US Patent 7892929 Shallow trench isolation corner rounding
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US Patent 7897453 Dual insulating layer diode with asymmetric interface state and method of fabrication
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US Patent 7897877 Capacitive substrate
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US Patent 7910432 Non-volatile semiconductor storage device and method of manufacturing the same
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US Patent 7910433 Methods of fabricating multi-layer nonvolatile memory devices
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US Patent 7910957 Semiconductor device
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US Patent 7911000 Semiconductor memory device
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US Patent 7911063 Semiconductor device
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US Patent 7919376 CMOS transistor and method for manufacturing the same
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US Patent 7923383 Method and apparatus for treating a semi-conductor substrate
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US Patent 7927987 Method of reducing channeling of ion implants using a sacrificial scattering layer
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US Patent 7932153 Semiconductor device and method for fabricating the same
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US Patent 7935575 Method of forming a semiconductor package and structure therefor
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US Patent 7943504 Self-releasing spring structures and methods
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US Patent 7944019 Voltage-controlled semiconductor inductor and method
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US Patent 7951678 Metal-gate high-k reference structure
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US Patent 7951723 Integrated etch and supercritical CO
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US Patent 7951730 Decreasing the etch rate of silicon nitride by carbon addition
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US Patent 7955909 Strained ultra-thin SOI transistor formed by replacement gate
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US Patent 7955959 Method for manufacturing GaN-based film LED
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US Patent 7956400 MIM capacitor integration
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US Patent 7964483 Growth method for nitride semiconductor epitaxial layers
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US Patent 7964493 Method of manufacturing semiconductor device
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US Patent 7972964 Semiconductor device with contact structure and manufacturing method thereof
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US Patent 7972977 ALD of metal silicate films
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US Patent 7977254 Method of forming a gate insulator in group III-V nitride semiconductor devices
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US Patent 7981810 Methods of depositing highly selective transparent ashable hardmask films
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US Patent 7985964 Light-emitting semiconductor device
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US Patent 7989320 Die bonding
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US Patent 7993936 System and method for controlling an electrochemical etch process
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US Patent 7998823 Method for reducing leakage currents caused by misalignment of a contact structure by increasing an error tolerance of the contact patterning process
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US Patent 8006640 Plasma processing apparatus and plasma processing method
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US Patent 8008685 Light emitting device, method of manufacturing light emitting device, light emitting device package, and lighting system
Edits on 8 Dec, 2021
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Golden AI
edited on 8 Dec, 2021
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Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
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US Patent 8006640 Plasma processing apparatus and plasma processing method
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Golden AI
edited on 8 Dec, 2021
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7993936 System and method for controlling an electrochemical etch process
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7989320 Die bonding
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7985964 Light-emitting semiconductor device
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7981810 Methods of depositing highly selective transparent ashable hardmask films
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7977254 Method of forming a gate insulator in group III-V nitride semiconductor devices
Edits on 8 Dec, 2021
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7972964 Semiconductor device with contact structure and manufacturing method thereof
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7972977 ALD of metal silicate films
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7964493 Method of manufacturing semiconductor device
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7964483 Growth method for nitride semiconductor epitaxial layers
Golden AI profile picture
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7956400 MIM capacitor integration
Golden AI profile picture
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7955959 Method for manufacturing GaN-based film LED
Golden AI profile picture
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7955909 Strained ultra-thin SOI transistor formed by replacement gate
Golden AI profile picture
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7951730 Decreasing the etch rate of silicon nitride by carbon addition
Golden AI profile picture
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7951723 Integrated etch and supercritical CO
Golden AI profile picture
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7951678 Metal-gate high-k reference structure
Golden AI profile picture
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7944019 Voltage-controlled semiconductor inductor and method

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