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US Patent 10508030 Seal for microelectronic assembly

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
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Date Filed
March 14, 2018
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Date of Patent
December 17, 2019
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Patent Application Number
15920759
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Patent Citations
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US Patent 10026605 Method of reducing residual contamination in singulated semiconductor die
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US Patent 10276619 Semiconductor device structure with a conductive feature passing through a passivation layer
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US Patent 10269756 Die processing
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US Patent 10075657 Edgeless large area camera system
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Patent Citations Received
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US Patent 12132020 Low temperature bonded structures
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US Patent 12068278 Processed stacked dies
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US Patent 12074092 Hard IP blocks with physically bidirectional passageways
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US Patent 12113054 Non-volatile dynamic random access memory
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US Patent 12113056 Stacked dies and methods for forming bonded structures
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US Patent 12125784 Interconnect structures
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US Patent 11515279 Low temperature bonded structures
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US Patent 11244920 Method and structures for low temperature device bonding
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US Patent 11600542 Cavity packages
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US Patent 11621246 Diffused bitline replacement in stacked wafer memory
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•••
Patent Inventor Names
Liang Wang
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Cyprian Emeka Uzoh
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Guilian Gao
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Ilyas Mohammed
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Rajesh Katkar
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Shaowu Huang
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
10508030
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Patent Primary Examiner
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Eduardo A Rodela
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