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US Patent 11784140 Semiconductor device and method of manufacture
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Patent
Date Filed
July 27, 2022
Date of Patent
October 10, 2023
Patent Application Number
17815338
Patent Citations
US Patent 9048222 Method of fabricating interconnect structure for package-on-package devices
US Patent 9048233 Package systems having interposers
US Patent 9064879 Packaging methods and structures using a die attach film
US Patent 9111949 Methods and apparatus of wafer level package for heterogeneous integration technology
US Patent 9263511 Package with metal-insulator-metal capacitor and method of manufacturing the same
US Patent 9281254 Methods of forming integrated circuit package
US Patent 9299649 3D packages and methods for forming the same
US Patent 9368460 Fan-out interconnect structure and method for forming same
US Patent 9372206 Testing of semiconductor chips with microbumps
US Patent 9425126 Dummy structure for chip-on-wafer-on-substrate
•••
Patent Citations Received
US Patent 11967563 Fan-out package having a main die and a dummy die
0
Patent Inventor Names
Chen-Hua Yu
Jiun Yi Wu
Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
11784140
Patent Primary Examiner
Victor A Mandala
CPC Code
H01L 2924/3511
H01L 2924/3512
H01L 2924/35121
H01L 23/49833
H01L 23/49822
H01L 23/5385
H01L 21/4857
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