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Laura M Menz

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Edits on 15 Dec, 2021
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Golden AI
edited on 15 Dec, 2021
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Patent primary examiner of
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US Patent 11177163 Top via structure with enlarged contact area with upper metallization level
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US Patent 11177180 Profile control of a gap fill structure
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US Patent 11177302 CMOS image sensor structure with microstructures formed on semiconductor layer
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US Patent 11183450 Electronic device having inverted lead pins
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US Patent 11183591 Lateral double-diffused metal-oxide-semiconductor (LDMOS) fin field effect transistor with enhanced capabilities
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US Patent 7439130 Semiconductor device with capacitor and method for fabricating the same
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US Patent 7439138 Method of forming integrated circuitry
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US Patent 7439141 Shallow trench isolation approach for improved STI corner rounding
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US Patent 7439153 Semiconductor device and manufacturing method thereof for reducing the area of the memory cell region
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US Patent 7439169 Integrated circuit and methods of redistributing bondpad locations
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US Patent 7442561 Method of piping defect detection
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US Patent 7442580 Manufacturing method of a package structure
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US Patent 7442968 Chip on film (COF) package having test pad for testing electrical function of chip and method for manufacturing same
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US Patent 7445973 Transistor surround gate structure with silicon-on-insulator isolation for memory cells, memory arrays, memory devices and systems and methods of forming same
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US Patent 7445976 Method of forming a semiconductor device having an interlayer and structure therefor
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US Patent 7446388 Integrated thin film capacitor/inductor/interconnect system and method
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US Patent 7452760 Thin film transistors and semiconductor constructions
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US Patent 7453121 Body contact formation in partially depleted silicon on insulator device
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US Patent 7456029 Planar flux concentrator for MRAM devices
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US Patent 7456064 High K dielectric material and method of making a high K dielectric material
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US Patent 7456497 Electronic devices and its production methods
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US Patent 7459757 Transistor structures
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US Patent 7462526 Method for fabricating semiconductor devices using strained silicon bearing material
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US Patent 7462540 Silicon carbide semiconductor device and process for producing the same
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US Patent 7462907 Method of increasing erase speed in memory arrays
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US Patent 7465616 Method of forming a field effect transistor
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US Patent 7470563 Microelectronic device packages and methods for controlling the disposition of non-conductive materials in such packages
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US Patent 7470577 Dual work function CMOS devices utilizing carbide based electrodes
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US Patent 7473947 Process for ultra-thin body SOI devices that incorporate EPI silicon tips and article made thereby
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US Patent 7473981 Electronic component
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US Patent 7476582 Semiconductor device and its manufacturing method
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US Patent 7479413 Method for fabricating semiconductor package with circuit side polymer layer
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US Patent 7482230 Recess channel transistor for preventing deterioration of device characteristics due to misalignment of gate layers and method of forming the same
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US Patent 7482249 Method and device for machining a wafer, in addition to a wafer comprising a separation layer and a support layer
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US Patent 7485506 Hybrid substrate technology for high-mobility planar and multiple-gate MOSFETS
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US Patent 7485541 Creation of high mobility channels in thin-body SOI devices
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US Patent 7485570 Silicon oxycarbide, growth method of silicon oxycarbide layer, semiconductor device and manufacture method for semiconductor device
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US Patent 7485926 SOI contact structures
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US Patent 7488987 Boron phosphide-based semiconductor light-emitting device and production method thereof
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US Patent 7491972 Polysilicon semiconductor thin film substrate, method for producing the same, semiconductor device, and electronic device
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US Patent 7491991 Method for fabricating CMOS image sensor
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US Patent 7494885 Disposable spacer process for field effect transistor fabrication
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US Patent 7494898 Method for manufacturing semiconductor device
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US Patent 7494925 Method for making through-hole conductors for semiconductor substrates
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US Patent 7494940 Post thermal treatment methods of forming high dielectric layers over interfacial layers in integrated circuit devices
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US Patent 7498188 Contacts for CMOS imagers and method of formation
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US Patent 7498245 Embrittled substrate and method for making same
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US Patent 7498256 Copper contact via structure using hybrid barrier layer
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US Patent 7498258 Through-hole conductors for semiconductor substrates and method for making same
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US Patent 7498628 Capacitor for a semiconductor device and manufacturing method thereof
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US Patent 7501674 Semiconductor device having fin transistor and planar transistor and associated methods of manufacture
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US Patent 7504301 Stressed field effect transistor and methods for its fabrication
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US Patent 7504321 MBE growth of an algan layer or AlGaN multilayer structure
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US Patent 7504342 Photolithography method for fabricating thin film
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US Patent 7504656 Organic light emitting display device and method of fabricating the same
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US Patent 7504705 Striped on-chip inductor
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US Patent 7508034 Single-crystal silicon substrate, SOI substrate, semiconductor device, display device, and manufacturing method of semiconductor device
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US Patent 7510984 Method of forming silicon nitride film and method of manufacturing semiconductor device
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US Patent 7514305 Apparatus and methods for improving the intensity profile of a beam image used to process a substrate
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US Patent 7514307 Method of manufacturing a semiconductor apparatus
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US Patent 11189682 Display device and method of manufacturing the same
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US Patent 7517720 Method for producing ZnTe system compound semiconductor single crystal, ZnTe system compound semiconductor single crystal, and semiconductor device
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US Patent 7517730 Coreless substrate and manufacturing method thereof
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US Patent 7517781 Method of manufacturing semiconductor device
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US Patent 7518204 Semiconductor device
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US Patent 7521282 Method for producing ZnTe system compound semiconductor single crystal, ZnTe system compound semiconductor single crystal, and semiconductor device
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US Patent 7521722 EL display device and a method of manufacturing the same
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US Patent 7524761 Method for manufacturing semiconductor device capable of reducing parasitic bit line capacitance
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US Patent 7527983 Ferromagnetic material
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US Patent 7528049 Method for manufacturing bonded SOI wafer and bonded SOI wafer manufactured thereby
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US Patent 7528406 Semiconductor integrated circuit and method of fabricating same
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US Patent 7531389 Method of manufacturing semiconductor device
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US Patent 7534648 Aligned nanotube bearing composite material
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US Patent 7537945 Semiconductor laser device and method of manufacturing the same, and optical transmission module and optical disk apparatus using the semiconductor laser device
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US Patent 7537977 Method for manufacturing a thin film transistor array panel for a liquid crystal display and a photolithography method for fabricating thin films
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US Patent 7538006 Annular damascene vertical natural capacitor
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US Patent 7538014 Method of producing crystalline semiconductor material and method of fabricating semiconductor device
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US Patent 7538037 Method for manufacturing semiconductor device
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US Patent 7541623 P-n heterojunction structure of zinc oxide-based nanorod and semiconductor thin film, preparation thereof, and nano-device comprising same
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US Patent 7544599 Manufacturing method of solder ball disposing surface structure of package substrate
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US Patent 7547942 Nonvolatile memory devices and methods of fabricating the same
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US Patent 7550289 Method of fabricating an entegral device of a biochip intergrated with micro thermo-electric elements and the apparatus thereof
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US Patent 7550359 Methods involving silicon-on-insulator trench memory with implanted plate
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US Patent 7550370 Method of forming thin SGOI wafers with high relaxation and low stacking fault defect density
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US Patent 7550844 Semiconductor device and manufacturing method thereof
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US Patent 7553694 Methods of forming a high conductivity diamond film and structures formed thereby
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US Patent 7553716 Method for manufacturing a semiconductor thin film
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US Patent 7557009 Process for controlling performance characteristics of a negative differential resistance (NDR) device
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US Patent 7557017 Method of manufacturing semiconductor device with two-step etching of layer
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US Patent 7560341 Semiconductor device and manufacturing method therefor
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US Patent 7560363 Manufacturing method for SIMOX substrate
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US Patent 7560381 Technique for metal deposition by electroless plating using an activation scheme including a substrate heating process
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US Patent 7563641 Laminated light-emitting diode display device and manufacturing method thereof
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US Patent 7563688 Method for fabricating capacitor in semiconductor device
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US Patent 7563702 Method for fabricating semiconductor device
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US Patent 7566599 High performance FET with elevated source/drain region
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US Patent 7566606 Methods of fabricating semiconductor devices having strained dual channel layers
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US Patent 7566907 Thin film transistors and semiconductor constructions
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US Patent 7569408 Semiconductor device and method for forming the same
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US Patent 7572482 Photo-patterned carbon electronics
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US Patent 7572724 Doped single crystal silicon silicided eFuse
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US Patent 7573087 Interconnect line selectively isolated from an underlying contact plug
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US Patent 7576005 Dense seed layer and method of formation
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US Patent 7579226 Thin layer element and associated fabrication process
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US Patent 7579269 Microelectronic spring contact elements
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US Patent 7582523 Method of manufacturing semiconductor device including insulated-gate field-effect transistors
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US Patent 7582912 Diode having high brightness and method thereof
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US Patent 7582942 Planar flux concentrator for MRAM devices
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US Patent 7585729 Method of manufacturing a non-volatile memory device
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US Patent 7589000 Fabrication method and fabrication apparatus of group III nitride crystal substance
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US Patent 7592191 Field emission backplate
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US Patent 7592266 Removing solution, cleaning method for semiconductor substrate, and process for production of semiconductor device
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US Patent 7595245 Semiconductor device having a gate electrode material feature located adjacent a gate width side of its gate electrode and a method of manufacture therefor
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US Patent 7595258 Overlay vernier of semiconductor device and method of manufacturing the same
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US Patent 7595555 Method of forming air gaps in a dielectric material using a sacrificial film and resulting structures
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US Patent 7599031 Liquid crystal display device
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US Patent 7601609 Method for manufacturing device isolation film of semiconductor device
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US Patent 7601632 Method of forming a metal line of a semiconductor device
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US Patent 7602062 Package substrate with dual material build-up layers
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US Patent 7608504 Memory and manufacturing method thereof
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US Patent 7611971 Method of removing residual contaminants from an environment
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US Patent 7615465 Creation of high mobility channels in thin-body SOI devices
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US Patent 7629185 Semiconductor laser device manufacturing method and semiconductor laser device
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US Patent 7629266 Etch compositions and methods of processing a substrate
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US Patent 7629625 Method for producing ZnTe system compound semiconductor single crystal, ZnTe system compound semiconductor single crystal, and semiconductor device
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US Patent 7632695 Semiconductor device manufacturing method
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US Patent 7632746 Method for patterning metal line in semiconductor device
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US Patent 7635640 Method of fabricating polycrystalline silicon thin film for improving crystallization characteristics and method of fabricating liquid crystal display device using the same
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US Patent 7635861 Semiconductor device and method of manufacturing the same
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US Patent 7638358 Display device and manufacturing method thereof
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US Patent 7638846 Semiconductor device and manufacturing method thereof
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US Patent 7642545 Layer and system with a silicon layer and a passivation layer, method for production of a passivation layer on a silicon layer and use thereof
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US Patent 7642591 Multi-resistive integrated circuit memory
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US Patent 7642660 Method and apparatus for reducing electrical interconnection fatigue
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US Patent 7646103 Dicing/die-bonding film, method of fixing chipped work and semiconductor device
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US Patent 7648920 Method of manufacturing semiconductor device
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US Patent 7655577 Method of forming silicon-containing insulation film having low dielectric constant and low film stress
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US Patent 7659126 Electrical test method and apparatus
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US Patent 7659127 Manufacturing device of semiconductor package and manufacturing method of semiconductor package
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US Patent 7662688 Application of different isolation schemes for logic and embedded memory
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US Patent 7663176 Method of manufacturing a nonvolatile semiconductor memory device, and a nonvolatile semiconductor memory device
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US Patent 7663193 Semiconductor device and manufacturing method thereof for reducing the area of the memory cell region
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US Patent 7666746 Semiconductor transistors having high-K gate dielectric layers, metal gate electrode regions, and low fringing capacitances
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US Patent 7667259 Non-volatile semiconductor device and method of fabricating embedded non-volatile semiconductor memory device with sidewall gate
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US Patent 7667291 FPGA structure provided with multi parallel structure and method for forming the same
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US Patent 7670877 Reliability enhancement process
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US Patent 7675132 Surface mounting optoelectronic component and method for producing same
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US Patent 7678599 Process for the fabrication of an inertial sensor with failure threshold
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US Patent 7682858 Wafer processing method including formation of a deteriorated layer
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US Patent 7682876 Electronic assemblies having a low processing temperature
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US Patent 7682928 Method of forming isolation layer of semiconductor device
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US Patent 7687309 CMOS-process-compatible programmable via device
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US Patent 7687887 Method of forming a self-aligned bipolar transistor structure using a selectively grown emitter
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US Patent 7691668 Method and apparatus for multi-chip packaging
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US Patent 7691690 Methods for forming dual fully silicided gates over fins of FinFet devices
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US Patent 7692301 Stitched micro-via to enhance adhesion and mechanical strength
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US Patent 7696049 Method to manufacture LDMOS transistors with improved threshold voltage control
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US Patent 7696084 Semiconductor device and method of producing the same
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US Patent 7700395 Hybrid integration based on wafer-bonding of devices to AlSb monolithically grown on Si
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US Patent 7700448 Manufacturing method of semiconductor device
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US Patent 7700456 Semiconductor device and manufacturing method of the same
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US Patent 7705955 Liquid crystal display device having more uniform seal heights and its fabricating method
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US Patent 7709293 Semiconductor device and manufacturing method of the semiconductor device
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US Patent 7709356 Methods of forming a pattern and methods of manufacturing a memory device using the same
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US Patent 7713763 Test structure for monitoring process characteristics for forming embedded semiconductor alloys in drain/source regions
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US Patent 7713812 Method for manufacturing semiconductor thin film
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US Patent 7713853 Method for manufacturing electronic devices integrated in a semiconductor substrate and corresponding devices
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US Patent 7718495 Methods of forming integrated circuitry, methods of forming memory circuitry, and methods of forming field effect transistors
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US Patent 7718520 Semiconductor integrated circuit device and related method
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US Patent 7723231 Semiconductor device and method of fabricating the same
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US Patent 7727834 Contact configuration and method in dual-stress liner semiconductor device
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US Patent 7741206 Pad structure for liquid crystal display and method of manufacturing thereof
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US Patent 7741671 Capacitor for a semiconductor device and manufacturing method thereof
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US Patent 7745308 Method of fabricating micro-vertical structure
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US Patent 7745343 Method for fabricating semiconductor device with fuse element
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US Patent 7749896 Semiconductor device and method for forming the same
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US Patent 7750353 Method of manufacturing silicon optoelectronic device, silicon optoelectronic device manufactured by the method, and image input and/or output apparatus using the silicon optoelectronic device
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US Patent 7750472 Dual metal interconnection
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US Patent 7754508 Method of manufacturing silicon optoelectronic device, silicon optoelectronic device manufactured by the method, and image input and/or output apparatus using the silicon optoelectronic device
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US Patent 7759184 Laterally diffused metal oxide semiconductor device and method of forming the same
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US Patent 7763511 Dielectric barrier for nanocrystals
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US Patent 7767565 Semiconductor device and method of fabricating the same
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US Patent 7767566 Flash memory device and method of forming the device
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US Patent 7772117 Methods of fabricating highly conductive regions in semiconductor substrates for radio frequency applications
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US Patent 7772121 Method of forming a trench structure
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US Patent 7776661 Nano-electromechanical circuit using co-planar transmission line
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US Patent 7781336 Semiconductor device including ruthenium electrode and method for fabricating the same
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US Patent 7781340 Method and system for etching high-k dielectric materials
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US Patent 7781875 Techniques for packaging multiple device components
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US Patent 7790560 Construction of flash memory chips and circuits from ordered nanoparticles
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US Patent 7799686 Materials for polishing liquid for metal, polishing liquid for metal, method for preparation thereof and polishing method using the same
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US Patent 7799687 Slurry composition for a chemical mechanical polishing process and method of manufacturing a semiconductor device using the slurry composition
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US Patent 7803644 Across reticle variation modeling and related reticle
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US Patent 7811926 Multilayer hardmask scheme for damage-free dual damascene processing of SiCOH dielectrics
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US Patent 7811933 CMOS-process-compatible programmable via device
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US Patent 7816195 Semiconductor device and manufacturing method thereof
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US Patent 7816213 Semiconductor device having transistors each having gate electrode of different metal ratio and production process thereof
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US Patent 7816760 Semiconductor structure including laminated isolation region
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US Patent RE41890 Methods for growing semiconductors and devices thereof from the alloy semiconductor GaInNAs
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US Patent 7821061 Silicon germanium and germanium multigate and nanowire structures for logic and multilevel memory applications
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US Patent 7825414 Method of forming a thin film transistor
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US Patent 7825442 Semiconductor device and method of manufacturing the same
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US Patent 7829398 Method for making thin film transistor
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US Patent 7829987 Carrier structure embedded with semiconductor chips and method for manufacturing the same
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US Patent 7838312 Light-emitting diode light bar and method for manufacturing the same
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US Patent 7838320 Semiconductor physical quantity sensor and method for manufacturing the same
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US Patent 7838363 Method of forming a split gate non-volatile memory cell
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US Patent 7842567 Dual work function CMOS devices utilizing carbide based electrodes
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US Patent 7842569 Flash memory device and method of fabricating the same
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US Patent 7842616 Methods for fabricating semiconductor structures
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US Patent 7843036 Enhanced on-chip decoupling capacitors and method of making same
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US Patent 7847214 Laser crystallization apparatus and crystallization method
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US Patent 7858502 Fabrication method and fabrication apparatus of group III nitride crystal substance
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US Patent 7863104 Method of producing a thin semiconductor chip
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US Patent 7863135 Method of manufacturing a nonvolatile semiconductor memory device, and a nonvolatile semiconductor memory device
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US Patent 7863171 SOI transistor having a reduced body potential and a method of forming the same
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US Patent 7863622 Semiconductor device and manufacturing method therefor
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US Patent 7863690 Semiconductor device
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US Patent 7879707 Semiconductor integrated circuit device and related method
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US Patent 7884004 Maskless process for suspending and thinning nanowires
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US Patent 7884360 Thin-film device and method of fabricating the same
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US Patent 7888228 Method of manufacturing an integrated circuit, an integrated circuit, and a memory module
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US Patent 7888677 Method for manufacturing a thin film transistor array panel for a liquid crystal display and a photolithography method for fabricating thin films
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US Patent 7888774 Interconnect line selectively isolated from an underlying contact plug
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US Patent 7892863 Measuring apparatus
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US Patent 7892881 Fabricating a device with a diamond layer
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US Patent 7892907 CMOS latch-up immunity
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US Patent 7892940 Device and methodology for reducing effective dielectric constant in semiconductor devices
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US Patent 7893424 Semiconductor layer structure with superlattice
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US Patent 7897474 Method of forming semiconductor device including capacitor and semiconductor device including capacitor
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US Patent 7902039 Method for manufacturing silicon wafer
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US Patent 7902548 Planar voltage contrast test structure
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US Patent 7906416 Method for manufacturing semiconductor device
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US Patent 7910940 Semiconductor light-emitting device
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US Patent 7919362 Method for preparing a cover for protecting a component on a substrate
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US Patent 7919826 Magnetoresistive element and manufacturing method thereof
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US Patent 7923318 HBT and field effect transistor integration
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US Patent 7927958 System and method for providing a self aligned bipolar transistor using a silicon nitride ring
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US Patent 7928019 Semiconductor processing
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US Patent 7928020 Method of fabricating a nitrogenated silicon oxide layer and MOS device having same
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US Patent 7932173 Method of fabricating integrated circuitry
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US Patent 7933112 Micro-electromechanical voltage tunable capacitor and and filter devices
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US Patent 7935595 Method for manufacturing semiconductor device
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US Patent 7935984 Compound semiconductor epitaxial substrate and method for producing the same
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US Patent 7935991 Semiconductor components with conductive interconnects
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US Patent 7939849 Diode having high brightness and method thereof
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US Patent 7943452 Gate conductor structure
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US Patent 7943475 Process for manufacturing a semiconductor device comprising a metal-compound film
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US Patent 7943492 Method of forming nitride film and nitride structure
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US Patent 7943997 Fully-depleted low-body doping field effect transistor (FET) with reverse short channel effects (SCE) induced by self-aligned edge back-gate(s)
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US Patent 7947563 Chip ID applying method suitable for use in semiconductor integrated circuit
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US Patent 7947596 Semiconductor device and method of manufacturing the same
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US Patent 7947601 Semiconductor devices and methods for forming patterned radiation blocking on a semiconductor device
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US Patent 7947976 Controlled alignment of catalytically grown nanostructures in a large-scale synthesis process
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US Patent 7956468 Semiconductor device
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US Patent 7960270 Method for fabricating circuit component
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US Patent 7964480 Single scan irradiation for crystallization of thin films
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US Patent 7968428 Fabrication method of semiconductor circuit device
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US Patent 7968886 Semiconductor integrated circuit and method of fabricating same
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US Patent 7972897 Methods for forming resistive switching memory elements
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US Patent 7972904 Wafer level packaging method
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US Patent 7972953 Pad structure for liquid crystal display and method of manufacturing thereof
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US Patent 7973409 Hybrid interconnect structure for performance improvement and reliability enhancement
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US Patent 7977121 Method and composition for restoring dielectric properties of porous dielectric materials
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US Patent 7977750 Semiconductor device and manufacturing method thereof
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US Patent 7981728 Coreless substrate
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US Patent 7982203 CMOS-process-compatible programmable via device
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US Patent 7982269 Transistors having asymmetric strained source/drain portions
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US Patent 7985696 Method of manufacturing semiconductor device
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US Patent 7989331 Method of manufacturing semiconductor device
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US Patent 7989350 Method for fabricating semiconductor device with recess gate
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US Patent 7994021 Method of manufacturing semiconductor device
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US Patent 7994042 Techniques for impeding reverse engineering
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US Patent 7998766 Semiconductor element and manufacturing method thereof
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US Patent 7999258 Display substrate and method of manufacturing the same
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US Patent 7999325 Method to remove spacer after salicidation to enhance contact etch stop liner stress on MOS
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US Patent 8003460 Method of forming a semiconductor structure comprising a formation of at least one sidewall spacer structure
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US Patent 8012824 Process to make high-K transistor dielectrics
Edits on 13 Dec, 2021
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US Patent 8012824 Process to make high-K transistor dielectrics
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US Patent 7999258 Display substrate and method of manufacturing the same
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edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 7998766 Semiconductor element and manufacturing method thereof
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Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 7994042 Techniques for impeding reverse engineering
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edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 7994021 Method of manufacturing semiconductor device
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edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 7989350 Method for fabricating semiconductor device with recess gate
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Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 7989331 Method of manufacturing semiconductor device
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Patent primary examiner of
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US Patent 7985696 Method of manufacturing semiconductor device
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edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 7982269 Transistors having asymmetric strained source/drain portions
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Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 7982203 CMOS-process-compatible programmable via device
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edited on 8 Dec, 2021
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US Patent 7981728 Coreless substrate
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edited on 8 Dec, 2021
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US Patent 7977750 Semiconductor device and manufacturing method thereof
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edited on 8 Dec, 2021
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edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 7973409 Hybrid interconnect structure for performance improvement and reliability enhancement
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Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 7972953 Pad structure for liquid crystal display and method of manufacturing thereof
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edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 7972904 Wafer level packaging method
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US Patent 7972897 Methods for forming resistive switching memory elements

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