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Luan C Thai

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Edits on 14 Dec, 2021
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edited on 14 Dec, 2021
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Patent primary examiner of
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US Patent 11171107 Semiconductor package
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US Patent 11183570 Structures and methods for noise isolation in semiconductor devices
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US Patent 7459405 Method using TEOS ramp-up during TEOS/ozone CVD for improved gap-fill
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US Patent 7476566 Electronic and optoelectronic component packaging technique
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US Patent 7482680 Customized non-volatile memory device packages
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US Patent 7485499 Customized non-volatile memory device packages
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US Patent 7488619 Method and apparatus for manufacturing IC chip packaged device
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US Patent 7489020 Semiconductor wafer assemblies
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US Patent 7491567 MEMS device packaging methods
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US Patent 7495256 Semiconductor apparatus and fabrication method of the same
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US Patent 7495315 Method and apparatus of fabricating a semiconductor device by back grinding and dicing
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US Patent 7498679 Package substrate and semiconductor package using the same
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US Patent 7507604 Breakable interconnects and structures formed thereby
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US Patent 7507606 Semiconductor device and method of manufacturing the same
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US Patent 7507664 Tungsten plug corrosion prevention method using ionized air
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US Patent 7510902 Image sensor chip package and method of fabricating the same
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US Patent 7510950 Method for manufacturing semiconductor device
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US Patent 7511382 Semiconductor chip arrangement and method
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US Patent 7514296 Method for manufacturing semiconductor device
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US Patent 11189585 Selective recess of interconnects for probing hybrid bond devices
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US Patent 7521290 Method of manufacturing circuit device
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US Patent 7521359 Interconnect structure encased with high and low k interlevel dielectrics
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US Patent 7521384 Method and apparatus for peeling surface protective film
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US Patent 7521794 Intrinsic thermal enhancement for FBGA package
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US Patent 7524693 Method and apparatus for forming an electrical connection to a semiconductor substrate
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US Patent 7524762 Atomic layer deposition of tantalum-containing materials using the tantalum precursor TAIMATA
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US Patent 7528007 Methods for assembling semiconductor devices and interposers
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US Patent 7528487 Semiconductor device having insulating material dispersed with conductive particles which establish electrical connection by penetrating to both copper conductive layer and land of wiring board
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US Patent 7531382 Method of fabricating a patterned device using sacrificial spacer layer
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US Patent 7531429 Methods and apparatuses for manufacturing ultra thin device layers for integrated circuit devices
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US Patent 7535076 Power semiconductor device
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US Patent 7535088 Secure-digital (SD) flash card with slanted asymmetric circuit board
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US Patent 7537976 Manufacturing method of thin film transistor
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US Patent 7538021 Removing dry film resist residues using hydrolyzable membranes
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US Patent 7541613 Methods for reducing within chip device parameter variations
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US Patent 7544531 Ground strap for suppressing stiction during MEMS fabrication
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US Patent 7547583 Light emitting diode package with direct leadframe heat dissipation
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US Patent 7547625 Methods for bonding and micro-electronic devices produced according to such methods
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US Patent 7547630 Method for stacking semiconductor chips
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US Patent 7547966 Power semiconductor module
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US Patent 7550320 Method of fabricating substrate with embedded component therein
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US Patent 7554131 Chip embedded package structure and fabrication method thereof
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US Patent 7554189 Wireless communication module
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US Patent 7554206 Microelectronic packages and methods therefor
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US Patent 7560307 Resin composition, heat-resistant resin paste and semiconductor device using these and method of preparing the same
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US Patent 7560802 Electrical connections in substrates
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US Patent 7564118 Chip and wafer integration process using vertical connections
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US Patent 7564121 Semiconductor device having shield structure
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US Patent 7564137 Stackable integrated circuit structures and systems devices and methods related thereto
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US Patent 7566614 Capacitor of semiconductor device and method of fabricating the same
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US Patent 7566649 Compressible films surrounding solder connectors
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US Patent 7569424 Method of forming a wall structure in a microelectronic assembly
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US Patent 7572693 Methods for transistor formation using selective gate implantation
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US Patent 7572725 Methods for wafer-level packaging of microelectronic devices and microelectronic devices formed by such methods
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US Patent 7572730 Method of manufacturing wiring substrate, liquid ejection head and image forming apparatus
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US Patent 7576402 Semiconductor device, method of manufacturing the same, and camera module
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US Patent 7576439 Electrically connecting substrate with electrical device
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US Patent 7579225 Method of forming semiconductor device having stacked transistors
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US Patent 7582552 Electronic apparatus with busbar assembly and electronic component mounted thereon by soldering
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US Patent 7588978 Method for forming semiconductor device
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US Patent 7589394 Interposer
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US Patent 7589426 Semiconductor assemblies including redistribution layers and packages and assemblies formed therefrom
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US Patent 7592703 RF and MMIC stackable micro-modules
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US Patent 7595221 Method of fabricating a patterned device using sacrificial spacer layer
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US Patent 7598117 Method for manufacturing semiconductor module using interconnection structure
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US Patent 7598520 Semiconductor device including active layer of zinc oxide with controlled crystal lattice spacing and manufacturing method thereof
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US Patent 7598619 Electronic component and semiconductor device, method of fabricating the same, circuit board mounted with the same, and electronic appliance comprising the circuit board
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US Patent 7601563 Small form factor molded memory card and a method thereof
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US Patent 7615468 Methods for making substrates and substrates formed therefrom
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US Patent 7615871 Method and apparatus for attaching microelectronic substrates and support members
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US Patent 7618862 Flash memory device and method for manufacturing the same
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US Patent 7619303 Integrated circuit package
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US Patent 7619305 Semiconductor package-on-package (POP) device avoiding crack at solder joints of micro contacts during package stacking
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US Patent 7622361 Method for manufacturing semiconductor device
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US Patent 7625773 Anti-stiction technique for electromechanical systems and electromechanical device employing same
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US Patent 7625807 Methods and systems to mitigate etch stop clipping for shallow trench isolation fabrication
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US Patent 7629183 Method for manufacturing semiconductor device and computer storage medium
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US Patent 7629697 Marker structure and method for controlling alignment of layers of a multi-layered substrate
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US Patent 7632710 Method for soldering electronic component and soldering structure of electronic component
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US Patent 7632740 Layer having functionality, method for forming flexible substrate having the same, and method for manufacturing semiconductor device
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US Patent 7632753 Wafer level package utilizing laser-activated dielectric material
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US Patent 7638348 Microlenses of CMOS image sensor and method for fabricating the same
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US Patent 7638365 Stacked chip package and method for forming the same
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US Patent 7642173 Three-dimensional face-to-face integration assembly
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US Patent 7642638 Inverted lead frame in substrate
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US Patent 7642653 Semiconductor device, wiring of semiconductor device, and method of forming wiring
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US Patent 7645637 Methods for assembling thin semiconductor die
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US Patent 7646020 Apparatus for observing an assembled state of components and method of observing an assembled state of components using such apparatus
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US Patent 7649264 Hard mask for low-k interlayer dielectric patterning
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US Patent 7651888 Wafer lever fixture and method for packaging micro-electro-mechanical-system devices
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US Patent 7651914 Manufacturing method of a nonvolatile semiconductor memory device
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US Patent 7652366 Pad arrangement of driver IC chip for LCD and related circuit pattern structure of tab package
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US Patent 7655541 Wafer processing method and laser processing apparatus
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US Patent 7659142 Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument
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US Patent 7659215 Method of depositing nanolaminate film for non-volatile floating gate memory devices by atomic layer deposition
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US Patent 7667336 Semiconductor device and method for manufacturing the same
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US Patent 7671373 LED chip package structure using a ceramic material as a substrate and a method for manufacturing the same
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US Patent 7674702 Solder bump formation in electronics packaging
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US Patent 7678615 Semiconductor device with gel-type thermal interface material
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US Patent 7683494 Press-fit integrated circuit package involving compressed spring contact beams
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US Patent 7687319 Semiconductor device and manufacturing method thereof
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US Patent 7691742 Atomic layer deposition of tantalum-containing materials using the tantalum precursor TAIMATA
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US Patent 7700475 Pillar structure on bump pad
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US Patent 7700986 Chip package carrier and fabrication method thereof
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US Patent 7701050 Side-view optical diode package and fabricating process thereof
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US Patent 7705429 Epitaxial semiconductor layer and method
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US Patent 7713808 CMOS image sensor and method for fabricating the same
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US Patent 7714446 Single mask via method and device
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US Patent 7719094 Semiconductor package and manufacturing method thereof
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US Patent 7727852 Substrate with check mark and method of inspecting position accuracy of conductive glue dispensed on the substrate
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US Patent 7732234 Fabrication process for package with light emitting device on a sub-mount
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US Patent 7732306 Methods for producing improved epitaxial materials
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US Patent 7736946 System and method for sealing a MEMS device
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US Patent 7741169 Mobility enhancement by strained channel CMOSFET with single workfunction metal-gate and fabrication method thereof
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US Patent 7745301 Methods and apparatus for high-density chip connectivity
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US Patent 7749795 Solar cell and method and apparatus for manufacturing solar cell
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US Patent 7749808 Stacked microelectronic devices and methods for manufacturing microelectronic devices
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US Patent 7749861 Method for manufacturing SOI substrate and SOI substrate
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US Patent 7750366 Solid-state imaging element and method for manufacturing the same
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US Patent 7750455 Triple tier package on package system
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US Patent 7754538 Packaging substrate structure with electronic components embedded therein and method for manufacturing the same
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US Patent 7754584 Semiconductor substrate, and semiconductor device and method of manufacturing the semiconductor device
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US Patent 7759144 Package for a semiconductor light emitting device
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US Patent 7759159 Variable resistance non-volatile memory cells and methods of fabricating same
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US Patent 7759690 Gallium nitride-based compound semiconductor light-emitting device
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US Patent 7767544 Semiconductor fabrication method and system
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US Patent 7767589 Passivation layer for a circuit device and method of manufacture
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US Patent 7768118 Semiconductor device
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US Patent 7772118 Substrate having high electrical connection reliability of a penetrating via connected to wirings and a method for manufacturing the same
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US Patent 7776658 Compact co-packaged semiconductor dies with elevation-adaptive interconnection plates
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US Patent 7776688 Use of a polymer spacer and Si trench in a bitline junction of a flash memory cell to improve TPD characteristics
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US Patent 7776701 Metal oxynitride as a pFET material
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US Patent 7777259 Multi-well CMOS image sensor and methods of fabricating the same
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US Patent 7777312 Semiconductor device and a method of manufacturing the same and a mounting structure of a semiconductor device
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US Patent 7777350 Semiconductor stack package having wiring extension part which has hole for wiring
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US Patent 7781331 Method for producing electrically conductive bushings through non-conductive or semiconductive substrates
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US Patent 7785935 Manufacturing method for forming an integrated circuit device and corresponding integrated circuit device
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US Patent 7791140 Double-gate semiconductor devices having gates with different work functions and methods of manufacture thereof
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US Patent 7791153 Method for manufacturing semiconductor device
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US Patent 7795706 Stacked memory without unbalanced temperature distributions
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US Patent 7795712 Lead frame with non-conductive connective bar
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US Patent 7795714 Two step molding process secured digital card manufacturing method and apparatus
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US Patent 7799707 Method of forming gated, self-aligned micro-structures and nano structures
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US Patent 7800121 Light emitting diode component
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US Patent 7804147 Light emitting diode package element with internal meniscus for bubble free lens placement
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US Patent 7804163 Seamless secured digital card manufacturing methods with male guide and female switch
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US Patent 7807503 Die-wafer package and method of fabricating same
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US Patent 7808072 Circuit board having conductive shield member and semiconductor package using the same
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US Patent 7812418 Chip-scaled MEMS microphone package
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US Patent 7816750 Thin semiconductor die packages and associated systems and methods
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US Patent 7821104 Package device having crack arrest feature and method of forming
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US Patent 7833828 Method of fabricating a patterned device using sacrificial spacer layer
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US Patent 7833829 MEMS devices and methods of assembling micro electromechanical systems (MEMS)
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US Patent 7833846 Array substrate and method of fabricating the same
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US Patent 7833847 Method of forming semiconductor device having stacked transistors
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US Patent 7833856 Semiconductor device and method of manufacturing same
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US Patent 7839001 Methods for making substrates and substrates formed therefrom
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US Patent 7842556 Method for low-temperature sealing of a cavity under vacuum or under controlled atmosphere
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US Patent 7843013 Semiconductor device and method for fabricating the same
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US Patent 7843053 Stack package made of chip scale packages
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US Patent 7843073 Semiconductor device and method for fabricating the same
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US Patent 7846751 LED chip thermal management and fabrication methods
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US Patent 7846753 Vertical light emitting diode and method of making a vertical light emitting diode
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US Patent 7846779 Power device package and method of fabricating the same
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US Patent 7846829 Stacked solder balls for integrated circuit device packaging and assembly
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US Patent 7851895 Semiconductor structure and semiconductor manufacturing method
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US Patent 7855099 Manufacturing method for a secure-digital (SD) flash card with slanted asymmetric circuit board
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US Patent 7855133 Formation of carbon and semiconductor nanomaterials using molecular assemblies
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US Patent 7855137 Method of making a sidewall-protected metallic pillar on a semiconductor substrate
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US Patent 7858420 Microelectronic imaging units and methods of manufacturing microelectronic imaging units
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US Patent 7858447 Lead frame, semiconductor device, and method of manufacturing semiconductor device
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US Patent 7859079 Power semiconductor device
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US Patent 7867859 Gate electrode with depletion suppression and tunable workfunction
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US Patent 7868443 Vertical stack type multi-chip package having improved grounding performance and lower semiconductor chip reliability
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US Patent 7871842 Production process for surface-mounting ceramic LED package, surface-mounting ceramic LED package produced by said production process, and mold for producing said package
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US Patent 7871862 Ball grid array package stacking system
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US Patent 7872332 Interconnect structures for stacked dies, including penetrating structures for through-silicon vias, and associated systems and methods
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US Patent 7879637 CMOS solid-state imaging device and method of manufacturing the same as well as drive method of CMOS solid-state imaging device
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US Patent 7879682 Marker structure and method for controlling alignment of layers of a multi-layered substrate
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US Patent 7880281 Switching assembly for an aircraft ignition system
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US Patent 7880315 Methods for bonding and micro-electronic devices produced according to such methods
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US Patent 7883989 Method for manufacturing semiconductor device
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US Patent 7884489 Press-fit integrated circuit package involving compressed spring contact beams
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US Patent 7892951 SOI substrates with a fine buried insulating layer
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US Patent 7898058 Integrated chip package structure using organic substrate and method of manufacturing the same
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US Patent 7898062 Epitaxial semiconductor layer and method
‌
US Patent 7902083 Passivation layer for a circuit device and method of manufacture
‌
US Patent 7906375 Compact co-packaged semiconductor dies with elevation-adaptive interconnection plates
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US Patent 7906780 Field effect transistor
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US Patent 7906807 Use of a polymer spacer and Si trench in a bitline junction of a flash memory cell to improve TPD characteristics
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US Patent 7910431 Method for manufacturing semiconductor device
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US Patent 7910461 Method for reuse of wafers for growth of vertically-aligned wire arrays
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US Patent 7911018 Optical device and method of manufacturing the same
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US Patent 7915106 Method of fabricating T-gate
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US Patent 7915131 Semiconductor device and method for fabricating the same
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US Patent 7919344 Image sensor and method for manufacturing the same
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US Patent 7923277 Production process for surface-mounting ceramic LED package, surface-mounting ceramic LED package produced by said production process, and mold for producing said package
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US Patent 7923335 Non-volatile memory device and manufacturing method thereof
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US Patent 7932612 Electronic component and semiconductor device, method of fabricating the same, circuit board mounted with the same, and electronic appliance comprising the circuit board
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US Patent 7935969 Method of manufacturing display device
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US Patent 7939400 Systems and methods that selectively modify liner induced stress
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US Patent 7939428 Methods for making substrates and substrates formed therefrom
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US Patent 7939432 Method of improving intrinsic gettering ability of wafer
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US Patent 7939913 Semiconductor device
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US Patent 7943408 Production process for surface-mounting ceramic LED package, surface-mounting ceramic LED package produced by said production process, and mold for producing said package
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US Patent 7943521 Method for patterning a semiconductor device
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US Patent 7943936 Crystallizing method, thin-film transistor manufacturing method, thin-film transistor, and display device
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US Patent 7947593 Method of manufacturing a semiconductor device having an intermetallic terminal pad and solder junction structure
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US Patent 7952164 Semiconductor device
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US Patent 7956398 Capacitor of semiconductor device and method of fabricating the same
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US Patent 7960215 Electronic device, electronic apparatus mounted with electronic device, article equipped with electronic device and method of producing electronic device
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US Patent 7960843 Chip arrangement and method of manufacturing a chip arrangement
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US Patent 7964434 Sodium doping method and system of CIGS based materials using large scale batch processing
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US Patent 7964964 Method of packaging and interconnection of integrated circuits
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US Patent 7968390 Electronic devices with improved ohmic contact
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US Patent 7968962 Semiconductor fabrication method and system
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US Patent 7977138 Optical device and method of manufacturing the same
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US Patent 7977239 Semiconductor device and method for fabricating the same
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US Patent 7981796 Methods for forming packaged products
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US Patent 7985650 Nonvolatile semiconductor memory device and method of manufacturing the same
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US Patent 7985653 Semiconductor chip with coil element over passivation layer
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US Patent 7989268 Small form factor molded memory card and a method thereof
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US Patent 7989313 Method and apparatus for creating RFID devices
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US Patent 7993964 Manufacturing method of semiconductor device including active layer of zinc oxide with controlled crystal lattice spacing
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US Patent 7999395 Pillar structure on bump pad
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US Patent 8003518 Semiconductor device fabrication method
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US Patent 8008131 Semiconductor chip package assembly method and apparatus for countering leadfinger deformation
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US Patent 8008170 Method for manufacturing semiconductor device
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US Patent 8012783 Semiconductor element and method for manufacturing same
Edits on 13 Dec, 2021
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edited on 13 Dec, 2021
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US Patent 8012783 Semiconductor element and method for manufacturing same
Edits on 8 Dec, 2021
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Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 8008170 Method for manufacturing semiconductor device
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edited on 8 Dec, 2021
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edited on 8 Dec, 2021
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US Patent 8003518 Semiconductor device fabrication method
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edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 7999395 Pillar structure on bump pad
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edited on 8 Dec, 2021
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Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 7989313 Method and apparatus for creating RFID devices
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Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 7989268 Small form factor molded memory card and a method thereof
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Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 7985653 Semiconductor chip with coil element over passivation layer
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Golden AI
edited on 8 Dec, 2021
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Infobox
Patent primary examiner of
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US Patent 7985650 Nonvolatile semiconductor memory device and method of manufacturing the same
Edits on 8 Dec, 2021
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Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 7981796 Methods for forming packaged products
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Golden AI
edited on 8 Dec, 2021
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Infobox
Patent primary examiner of
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US Patent 7977239 Semiconductor device and method for fabricating the same
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Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 7977138 Optical device and method of manufacturing the same
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Golden AI
edited on 8 Dec, 2021
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Infobox
Patent primary examiner of
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US Patent 7968962 Semiconductor fabrication method and system
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Golden AI
edited on 8 Dec, 2021
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Infobox
Patent primary examiner of
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US Patent 7968390 Electronic devices with improved ohmic contact
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Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 7964964 Method of packaging and interconnection of integrated circuits
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edited on 8 Dec, 2021
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edited on 7 Dec, 2021
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US Patent 7960843 Chip arrangement and method of manufacturing a chip arrangement
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edited on 7 Dec, 2021

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