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US Patent 10923408 Cavity packages
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Patent
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Date Filed
December 6, 2018
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Date of Patent
February 16, 2021
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Patent Application Number
16212471
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Patent Citations
US Patent 10026605 Method of reducing residual contamination in singulated semiconductor die
US Patent 10075657 Edgeless large area camera system
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US Patent 10204893 Stacked dies and methods for forming bonded structures
US Patent 10276619 Semiconductor device structure with a conductive feature passing through a passivation layer
US Patent 10269756 Die processing
US Patent 10446456 Integrated circuits protected by substrates with cavities, and methods of manufacture
US Patent 10276909 Structure comprising at least a first element bonded to a carrier having a closed metallic channel waveguide formed therein
US Patent 10002844 Bonded structures
Patent Citations Received
US Patent 12132020 Low temperature bonded structures
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US Patent 12068278 Processed stacked dies
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US Patent 12074092 Hard IP blocks with physically bidirectional passageways
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US Patent 12113054 Non-volatile dynamic random access memory
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US Patent 12113056 Stacked dies and methods for forming bonded structures
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US Patent 11515279 Low temperature bonded structures
US Patent 11600542 Cavity packages
US Patent 11610846 Protective elements for bonded structures including an obstructive element
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US Patent 11621246 Diffused bitline replacement in stacked wafer memory
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US Patent 11257727 Seal for microelectronic assembly
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•••
Patent Inventor Names
Javier A. DeLaCruz
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Rajesh Katkar
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Shaowu Huang
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Belgacem Haba
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Liang Wang
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
10923408
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Patent Primary Examiner
Michelle Mandala
0
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