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Ly D Pham
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Edits on 14 Dec, 2021
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Golden AI
edited on 14 Dec, 2021
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Patent primary examiner of
US Patent 11169080 Method and system for determining a remaining service life of a process device through which fluid flows
US Patent 11170854 Layout pattern of two-port ternary content addressable memory
US Patent 11176043 Distributed memory-augmented neural network architecture
US Patent 11177005 Semiconductor memory device having plurality of memory chips
US Patent 7200033 MRAM with coil for creating offset field
US Patent 7269091 Word line driver circuitry and methods for using the same
US Patent 11181552 Categorization of acquired data based on explicit and implicit means
US Patent 11182308 Semiconductor device with secure access key and associated methods and systems
US Patent 11183254 Controller and method of operating the same
US Patent 7366012 Synchronous memory device with reduced power consumption
US Patent 7379356 Memory, integrated circuit and methods for adjusting a sense amp enable signal used therewith
US Patent 7382658 Non-volatile memory embedded in a conventional logic process and methods for operating same
US Patent 7382659 Twin insulator charge storage device operation and its fabrication method
US Patent 7385850 Method of programming and verifying cells of a nonvolatile memory and relative NAND FLASH memory
US Patent 7385863 Semiconductor memory device
US Patent 7388781 Multi-bit-per-cell flash memory device with non-bijective mapping
US Patent 7388801 Reduction of fusible links and associated circuitry on memory dies
US Patent 7388802 Memory protected against attacks by error injection in memory cells selection signals
US Patent 7391656 Self-feedback control pipeline architecture for memory read path applications
US Patent 7391662 Semiconductor memory device with redundancy circuit
US Patent 7394678 Over-driven access method and device for ferroelectric memory
US Patent 7394692 Non-volatile semiconductor memory with large erase blocks storing cycle counts
US Patent 7394703 Twin insulator charge storage device operation and its fabrication method
US Patent 7397709 Method and apparatus for in-system redundant array repair on integrated circuits
US Patent 7400530 Semiconductor memory
US Patent 7400538 NROM memory device with enhanced endurance
US Patent 7405958 Magnetic memory device having XP cell and Str cell in one chip
US Patent 7405964 Integrated circuit to identify read disturb condition in memory cell
US Patent 7405990 Method and apparatus for in-system redundant array repair on integrated circuits
US Patent 7411809 Ferroelectric memory to be tested by applying disturbance voltage to a plurality of ferroelectric capacitors at once in direction to weaken polarization, and method of testing the same
US Patent 7411822 Nonvolatile memory cell arrangement
US Patent 7417910 Low voltage semiconductor memory device
US Patent 7423908 Nonvolatile memory devices and methods of controlling the wordline voltage of the same
US Patent 7423919 Method and system for improved efficiency of synchronous mirror delays and delay locked loops
US Patent 7428161 Semiconductor memory device with MOS transistors each having floating gate and control gate
US Patent 7428166 Non-volatile memory device and method of preventing hot electron program disturb phenomenon
US Patent 7428179 Apparatus for controlling activation of semiconductor integrated circuit and controlling method of the same
US Patent 7433233 NAND memory array incorporating capacitance boosting of channel regions in unselected memory cells and method for operation of same
US Patent 7440312 Memory write timing system
US Patent 7440332 Low power multiple bit sense amplifier
US Patent 7440350 Semiconductor integrated circuit device
US Patent 7443717 Semiconductor device
US Patent 7443720 Method and circuit for reading quantum state
US Patent 7443731 Semiconductor nonvolatile memory device
US Patent 7443743 Method and system for improved efficiency of synchronous mirror delays and delay locked loops
US Patent 7447076 Systems for reverse reading in non-volatile memory with compensation for coupling
US Patent 7447095 Multi-port memory device
US Patent 7447104 Word line driver for DRAM embedded in a logic process
US Patent 7447109 Semiconductor storage device
US Patent 7447110 Integrated circuit devices having dual data rate (DDR) output circuits therein
US Patent 7450417 Nonvolatile semiconductor memory device
US Patent 7450423 Methods of operating non-volatile memory cells having an oxide/nitride multilayer insulating structure
US Patent 7450443 Phase detection method, memory control method, and related device
US Patent 7450450 Circuitry for a programmable element
US Patent 7453714 Over-driven access method and device for ferroelectric memory
US Patent 7453725 Apparatus for eliminating leakage current of a low Vt device in a column latch
US Patent 7453736 Methods of erasing and designing electrically erasable charge trap nonvolatile memory cells having erase threshold voltage that is higher than an initial threshold voltage
US Patent 7457142 Semiconductor memory device
US Patent 7457163 System for verifying non-volatile storage using different voltages
US Patent 7457168 Non-volatile memory device and associated method of erasure
US Patent 7457179 Semiconductor memory device, system and method of testing same
US Patent 7457184 Dielectric relaxation memory
US Patent 7457187 Design structure for in-system redundant array repair in integrated circuits
US Patent 7460387 eDRAM hierarchical differential sense amp
US Patent 7460407 Temperature compensation of voltages of unselected word lines in non-volatile memory based on word line position
US Patent 7460412 Flash memory device and erasing method thereof
US Patent 7460423 Hierarchical 2T-DRAM with self-timed sensing
US Patent 7463528 Temperature compensation of select gates in non-volatile memory
US Patent 7466598 Method of programming a NAND flash memory device
US Patent 7468909 Semiconductor device and method of controlling the same
US Patent 7468921 Method for increasing programming speed for non-volatile memory by applying direct-transitioning waveforms to word lines
US Patent 7471576 Method of transferring data in an electrically programmable memory
US Patent 7474565 Programming scheme for non-volatile flash memory
US Patent 7474582 Systems and methods for managing power
US Patent 7477546 Non-volatile memory embedded in a conventional logic process and methods for operating same
US Patent 7477566 Multi-port semiconductor memory
US Patent 7480176 Systems for programming differently sized margins and sensing with compensations at select states for improved read operations in non-volatile memory
US Patent 7480184 Maximum likelihood statistical method of operations for multi-bit semiconductor memory
US Patent 7483307 Method and apparatus for sensing in charge trapping non-volatile memory
US Patent 7483316 Method and apparatus for refreshing programmable resistive memory
US Patent 7486541 Resistive cell structure for reducing soft error rate
US Patent 7486549 Thin film magnetic memory device having redundant configuration
US Patent 7486556 Semiconductor memory
US Patent 7486560 Apparatus and associated method for making a virtual ground array structure that uses inversion bit lines
US Patent 7486581 Circuit and method for controlling sense amplifier of semiconductor memory apparatus
US Patent 7489575 Noise resistant small signal sensing circuit for a memory device
US Patent 7492642 Flash memory device capable of reduced programming time
US Patent 7495976 Repairing integrated circuit memory arrays
US Patent 7499307 Scalable embedded DRAM array
US Patent 7499312 Fast, stable, SRAM cell using seven devices and hierarchical bit/sense line
US Patent 7499321 Semiconductor integrated circuit
US Patent 7499323 Flash memory device and data I/O operation method thereof
US Patent 7499342 Dynamic module output device and method thereof
US Patent 7499346 High voltage generating device of semiconductor device
US Patent 7499350 Sense amplifier enable signal generator for semiconductor memory device
US Patent 7499363 Semiconductor memory apparatus capable of reducing ground noise
US Patent 7505299 Semiconductor memory device
US Patent 7505302 Multi-level dynamic memory device
US Patent 7505321 Programmable memory array structure incorporating series-connected transistor strings and methods for fabrication and operation of same
US Patent 7505352 Parallel operational processing device
US Patent 7508701 Negative differential resistance devices and approaches therefor
US Patent 7512007 Data processing device
US Patent 7512008 Circuit to control voltage ramp rate
US Patent 7512018 Column address enable signal generation circuit for semiconductor memory device
US Patent 7515454 CBRAM cell and CBRAM array, and method of operating thereof
US Patent 7515461 Current compliant sensing architecture for multilevel phase change memory
US Patent 11188596 Storage optimization for products manufacturing
US Patent 7518931 Method of monitoring an erase threshold voltage distribution in a NAND flash memory device
US Patent 7522456 Non-volatile memory embedded in a conventional logic process and methods for operating same
US Patent 7529135 Apparatus for controlling bitline bias voltage
US Patent 7529147 Semiconductor device and method of fabricating the same
US Patent 7532512 Non-volatile memory device and method of handling a datum read from a memory cell
US Patent 7535751 Dual-port SRAM device
US Patent 7535753 Semiconductor memory device
US Patent 7535767 Reading multi-cell memory devices utilizing complementary bit information
US Patent 7539059 Selective bit line precharging in non volatile memory
US Patent 7539076 Variable data width memory systems and methods
US Patent 7548445 Over-driven access method and device for ferroelectric memory
US Patent 7548470 Memory control method and memory control circuit
US Patent 7554839 Symmetric blocking transient voltage suppressor (TVS) using bipolar transistor base snatch
US Patent 7554851 Reset method of non-volatile memory
US Patent 7554864 Semiconductor memory device including a global input/output line of a data transfer path and its surrounding circuits
US Patent 7554866 Circuit and method of controlling input/output sense amplifier of a semiconductor memory device
US Patent 7558106 Thin film magnetic memory device writing data with bidirectional current
US Patent 7558133 System and method for capturing data signals using a data strobe signal
US Patent 7558147 Semiconductor memory device
US Patent 7561473 System for performing data pattern sensitivity compensation using different voltage
US Patent 7561480 Ground biased bitline register file
US Patent 7561488 Wordline driving circuit and method for semiconductor memory
US Patent 7564709 Method and system for utilizing DRAM components in a system-on-chip
US Patent 7564731 Software refreshed memory device and method
US Patent 7567448 Content addressable memory cell having a single floating gate transistor
US Patent 7567450 Low power ROM
US Patent 7567454 Thin film magnetic memory device capable of conducting stable data read and write operations
US Patent 7567455 Method and system for programming non-volatile memory cells based on programming of proximate memory cells
US Patent 7567456 Page buffer circuit and method for a programmable memory device
US Patent 7567457 Nonvolatile memory array architecture
US Patent 7570534 Enqueue event first-in, first-out buffer (FIFO)
US Patent 7577012 Ferroelectric memory device, method for driving ferroelectric memory device, electronic apparatus, and method for driving electronic apparatus
US Patent 7577014 Semiconductor memory device
US Patent 7577015 Memory content inverting to minimize NTBI effects
US Patent 7577049 Speculative sense enable tuning apparatus and associated methods
US Patent 7580284 Flash memory devices and methods of programming the same by overlapping programming operations for multiple mats
US Patent 7580306 Semiconductor memory apparatus
US Patent 7583530 Multi-bit memory technology (MMT) and cells
US Patent 7586789 Method for adjusting programming/erasing time in memory system
US Patent 7586800 Memory timing apparatus and associated methods
US Patent 7589990 Semiconductor ROM device and manufacturing method thereof
US Patent 7589998 Non-volatile memory device and method of operation therefor
US Patent 7590014 Semiconductor memory device with mirror function module and using the same
US Patent 7596019 Non-volatile memory device and method of preventing hot electron program disturb phenomenon
US Patent 7596039 Input-output line sense amplifier having adjustable output drive capability
US Patent 7596045 Design structure for initializing reference cells of a toggle switched MRAM device
US Patent 7602652 Systems for programming differently sized margins and sensing with compensations at select states for improved read operations in non-volatile memory
US Patent 7602661 Semiconductor memory apparatus and method of controlling the same
US Patent 7606061 SRAM device with a power saving module controlled by word line signals
US Patent 7609566 Semiconductor memory device
US Patent 7613044 Method and apparatus for high voltage operation for a high performance semiconductor memory device
US Patent 7616475 Memory element and memory
US Patent 7616498 Non-volatile storage system with resistance sensing and compensation
US Patent 7616499 Retention margin program verification
US Patent 7616508 Flash-based FPGA with secure reprogramming
US Patent 7619935 Memory device with separate read and write gate voltage controls
US Patent 7623366 Semiconductor device having a field effect source/drain region
US Patent 7623381 Non-volatile memory device and method of erasing the same
US Patent 7623382 Semiconductor memory and address-decoding circuit and method for decoding address
US Patent 7623394 High voltage generating device of semiconductor device
US Patent 7623397 Semiconductor device
US Patent 7626852 Adaptive voltage control for SRAM
US Patent 7630272 Multiple port memory with prioritized world line driver and method thereof
US Patent 7633784 Junction field effect dynamic random access memory cell and content addressable memory cell
US Patent 7633800 Redundancy scheme in memory
US Patent 7633801 Memory in logic cell
US Patent 7633810 Non-volatile memory embedded in a conventional logic process and methods for operating same
US Patent 7633811 Non-volatile memory embedded in a conventional logic process and methods for operating same
US Patent 7636272 Multi-port memory device
US Patent 7639525 Semiconductor memory device
US Patent 7639556 Bit line sense amplifier of semiconductor memory device having open bit line structure
US Patent 7643324 Method and apparatus for performing variable word width searches in a content addressable memory
US Patent 7643333 Process for erasing chalcogenide variable resistance memory bits
US Patent 7643338 Method for programming a flash memory device
US Patent 7643341 Integrated circuit having a memory arrangement
US Patent 7643342 Multi-bit-per-cell flash memory device with non-bijective mapping
US Patent 7646653 Driver circuits for integrated circuit devices that are operable to reduce gate induced drain leakage (GIDL) current in a transistor and methods of operating the same
US Patent 7649771 Method for decreasing program disturb in memory cells
US Patent 7649774 Method of controlling memory system
US Patent 7649789 Semiconductor memory device with various delay values
US Patent 7652907 Electrochemical memory device
US Patent 7652909 2T/2C ferroelectric random access memory with complementary bit-line loads
US Patent 7656715 Semiconductor memory device
US Patent 7660166 Method of improving programming precision in flash memory
US Patent 7660181 Method of making non-volatile memory cell with embedded antifuse
US Patent 7663931 Word line driving method of semiconductor memory device
US Patent 7668028 Dual in-line memory module, memory test system, and method for operating the dual in-line memory module
US Patent 7668032 Refresh operation of memory device
US Patent 7672177 Memory device and method thereof
US Patent 7675797 CAS latency circuit and semiconductor memory device including the same
US Patent 7684229 Scalable embedded DRAM array
US Patent 7684245 Non-volatile memory array architecture with joined word lines
US Patent 7684247 Reverse reading in non-volatile memory with compensation for coupling
US Patent 7688613 Method and system for controlling multiple electrical fuses with one program device
US Patent 7688634 Method of operating an integrated circuit having at least one memory cell
US Patent 7688653 Method and system for improved efficiency of synchronous mirror delays and delay locked loops
US Patent 7697353 Semiconductor device
US Patent 7701776 Low power multiple bit sense amplifier
US Patent 7729154 Integrated circuit with buried control line structures
US Patent 7729169 Multiple programming of spare memory region for nonvolatile memory
US Patent 7729172 Method of programming a NAND flash memory device
US Patent 7733692 Thin film magnetic memory device capable of conducting stable data read and write operations
US Patent 7733716 Signal masking method, signal masking circuit, and semiconductor integrated circuit
US Patent 7733729 Thermally stable reference voltage generator for MRAM
US Patent 7742337 Semiconductor memory
US Patent 7746703 Flash memory device and method of programming flash memory device
US Patent 7746707 Nonvolatile semiconductor memory device
US Patent 7751222 Semiconductor memory device
US Patent 7751228 Dielectric relaxation memory
US Patent 7751238 Memory system protected from errors due to read disturbance and reading method thereof
US Patent 7751255 Semiconductor nonvolatile memory device
US Patent 7755920 Electronic memory device
US Patent 7755950 Programming methods of memory systems having a multilevel cell flash memory
US Patent 7755965 Temperature dependent system for reading ST-RAM
US Patent 7760553 Fuse circuit and flash memory device having the same
US Patent 7760571 Image memory architecture for achieving high speed access
US Patent 7768836 Nonvolatile memory and method with reduced program verify by ignoring fastest and/or slowest programming bits
US Patent 7768838 Operating memory cells
US Patent 7768861 Software refreshed memory device and method
US Patent 7773401 Loading data with error detection in a power on sequence of flash memory device
US Patent 7773426 Data processing system and nonvolatile memory
US Patent 7782656 SRAM with improved read/write stability
US Patent 7782657 Semiconductor device
US Patent 7782658 Semiconductor device
US Patent 7782662 Storage device
US Patent 7791975 Scalable embedded DRAM array
US Patent 7800943 Integrated circuit having a memory cell arrangement and method for reading a memory cell state using a plurality of partial readings
US Patent 7800971 Flash memory devices and methods of programming the same by overlapping programming operations for multiple mats
US Patent 7804708 Integrated circuit including an array of memory cells and method
US Patent 7804721 Enqueue event first-in, first-out buffer (FIFO)
US Patent 7808806 Semiconductor apparatus having a large-size bus connection
US Patent 7808837 Non-volatile memory control device
US Patent 7808838 Nonvolatile memory devices and methods of controlling the wordline voltage of the same
US Patent 7808856 Method to reduce leakage of a SRAM-array
US Patent 7813157 Non-linear conductor memory
US Patent 7813162 SRAM cell having asymmetric pass gates
US Patent 7813169 Integrated circuit and method to operate an integrated circuit
US Patent 7813192 System and method for capturing data signals using a data strobe signal
US Patent 7817460 Semiconductor memory device
US Patent 7817477 Manufacturing method, remanufacturing method and reshipping method for a semiconductor memory device
US Patent 7821805 Semiconductor memory device
US Patent 7821807 Nonequilibrium photodetectors with single carrier species barriers
US Patent 7821830 Flash memory device with redundant columns
US Patent 7821839 Gain control for read operations in flash memory
US Patent 7821841 Method of detecting a light attack against a memory device and memory device employing a method of detecting a light attack
US Patent 7821858 eDRAM hierarchical differential sense AMP
US Patent 7826246 Reading circuit and method in a data-storage system
US Patent 7826286 Semiconductor memory device with redundancy circuit
US Patent 7830710 Semiconductor memory device
US Patent 7835175 Static random access memories and access methods thereof
US Patent 7835207 Stacked device remapping and repair
US Patent 7835208 Multi-level dynamic memory device
US Patent 7835211 Semiconductor device and method of fabricating the same
US Patent 7835214 Semiconductor memory apparatus capable of reducing ground noise
US Patent 7835215 Semiconductor memory apparatus capable of reducing ground noise
US Patent 7839669 Semiconductor memory device
US Patent 7843718 Non-volatile memory devices including stacked NAND-type resistive memory cell strings and methods of fabricating the same
US Patent 7843734 Flash memory device and data I/O operation method thereof
US Patent 7843739 System for verifying non-volatile storage using different voltages
US Patent 7843754 Method of reducing current of memory in self-refreshing mode and related memory
US Patent 7843755 Circuit and method for controlling sense amplifier of semiconductor memory apparatus
US Patent 7848151 Circuit to control voltage ramp rate
US Patent 7848167 Apparatus and method for generating wide-range regulated supply voltages for a flash memory
US Patent 7855911 Reconfigurable magnetic logic device using spin torque
US Patent 7855914 Semiconductor memory device capable of suppressing peak current
US Patent 7855916 Nonvolatile memory systems with embedded fast read and write memories
US Patent 7859884 Structure and method for biasing phase change memory array for reliable writing
US Patent 7859911 Circuit and system for programming a floating gate
US Patent 7859912 Mid-size NVM cell and array utilizing gated diode for low current programming
US Patent 7864573 Programming analog memory cells for reduced variance after retention
US Patent 7864579 Integrated circuits having a controller to control a read operation and methods for operating the same
US Patent 7864594 Memory apparatus and method thereof for operating memory
US Patent 7869243 Memory module
US Patent 7869266 Low current switching magnetic tunnel junction design for magnetic memory using domain wall motion
US Patent 7869288 Output enable signal generating circuit and method of semiconductor memory apparatus
US Patent 7869295 Semiconductor memory apparatus
US Patent 7872928 Write control signal generation circuit, semiconductor IC having the same and method of driving semiconductor IC
US Patent 7872931 Integrated circuit with control circuit for performing retention test
US Patent 7876604 Stram with self-reference read scheme
US Patent 7876613 Multi-bit flash memory devices having a single latch structure and related programming methods, systems and memory cards
US Patent 7881093 Programmable precision resistor and method of programming the same
US Patent 7885096 Thin film magnetic memory device writing data with bidirectional current
US Patent 7885122 Flash-based FPGA with secure reprogramming
US Patent 7885126 Apparatus for controlling activation of semiconductor integrated circuit
US Patent 7885129 Memory chip and method for operating the same
US Patent 7889532 Bit line sense amplifier of semiconductor memory device having open bit line structure
US Patent 7894267 Deterministic programming algorithm that provides tighter cell distributions with a reduced number of programming pulses
US Patent 7894273 Nonvolatile memory and method with reduced program verify by ignoring fastest and/or slowest programming bits
US Patent 7898838 Resistive sense memory calibration for self-reference read method
US Patent 7898872 Operating method used in read or verification method of nonvolatile memory device
US Patent 7898891 Semiconductor memory device
US Patent 7903479 Semiconductor memory device
US Patent 7903499 Integrated circuit memory devices including delayed clock inputs for input/output buffers and related systems and methods
US Patent 7907434 Semiconductor apparatus having a large-size bus connection
US Patent 7907456 Memory having circuitry controlling the voltage differential between the word line and array supply voltage
US Patent 7911858 Semiconductor device with DDR memory controller
US Patent 7920410 Memory elements with increased write margin and soft error upset immunity
US Patent 7924630 Techniques for simultaneously driving a plurality of source lines
US Patent 7929338 Memory reading method for resistance drift mitigation
US Patent 7933162 Row addressing
US Patent 7936580 MRAM diode array and access method
US Patent 7936589 Adaptive voltage control for SRAM
US Patent 7936593 Reducing drift in chalcogenide devices
US Patent 7936607 Non-volatile memory
US Patent 7936609 Memory controller, memory system, recording and reproducing method for memory system, and recording apparatus
US Patent 7944732 Integrated capacitor with alternating layered segments
US Patent 7944752 Method for programming a flash memory device
US Patent 7944768 Software refreshed memory device and method
US Patent 7957209 Method of operating a memory apparatus, memory device and memory apparatus
US Patent 7961523 Nonvolatile memory device and programming method
US Patent 7965559 Systems and methods for improved floating-gate transistor programming
US Patent 7965571 On die thermal sensor
US Patent 7969767 Spin transfer torque—magnetic tunnel junction device and method of operation
US Patent 7969781 Method of controlling memory system
US Patent 7969790 Method of erasing an NVM cell that utilizes a gated diode
US Patent 7978511 Data line management in a memory device
US Patent 7978519 Method of reading an NVM cell that utilizes a gated diode
US Patent 7978542 Thin film magnetic memory device writing data with bidirectional current
US Patent 7983073 Static random access memories and access methods thereof
US Patent 7990766 Multi-bit-per-cell flash memory device with non-bijective mapping
US Patent 7995377 Semiconductor memory device
US Patent 7995387 System and method to read data subject to a disturb condition
US Patent 8000062 Enhanced magnetoresistance and localized sensitivity by gating in lorentz magnetoresistors
US Patent 8000124 Symmetric blocking transient voltage suppressor (TVS) using bipolar transistor base snatch
US Patent 8000133 Thin film magnetic memory device capable of conducting stable data read and write operations
US Patent 8000147 Nonvolatile semiconductor memory device
US Patent 8004868 Method and apparatus for performing variable word width searches in a content addressable memory
US Patent 8006257 Optical disc having gas flow spoiler and the method for fabricating the same
US Patent 8009392 Thin film magnetic head and magnetic disk device
US Patent 8009489 Memory with read cycle write back
Edits on 8 Dec, 2021
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 8009489 Memory with read cycle write back
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 8009392 Thin film magnetic head and magnetic disk device
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 8006257 Optical disc having gas flow spoiler and the method for fabricating the same
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 8004868 Method and apparatus for performing variable word width searches in a content addressable memory
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 8000147 Nonvolatile semiconductor memory device
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 8000133 Thin film magnetic memory device capable of conducting stable data read and write operations
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 8000124 Symmetric blocking transient voltage suppressor (TVS) using bipolar transistor base snatch
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 8000062 Enhanced magnetoresistance and localized sensitivity by gating in lorentz magnetoresistors
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7995387 System and method to read data subject to a disturb condition
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7995377 Semiconductor memory device
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7990766 Multi-bit-per-cell flash memory device with non-bijective mapping
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7983073 Static random access memories and access methods thereof
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7978542 Thin film magnetic memory device writing data with bidirectional current
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7978511 Data line management in a memory device
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7978519 Method of reading an NVM cell that utilizes a gated diode
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7969790 Method of erasing an NVM cell that utilizes a gated diode
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7969781 Method of controlling memory system
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7969767 Spin transfer torque—magnetic tunnel junction device and method of operation
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7965571 On die thermal sensor
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