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Cassandra Cox
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Megan Gustafson
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Megan Gustafson
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Golden AI
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Patent primary examiner of
US Patent 7236038 Pulse generator and method for pulse generation thereof
US Patent 7250799 Semiconductor device
US Patent 7250802 Clock generator having a 50% duty-cycle
US Patent 7250811 Internal voltage generator of semiconductor memory device
US Patent 7253669 High resolution digital loop circuit
US Patent 7253673 Multi-phase clock generator and generating method for network controller
US Patent 7253674 Output clock phase-alignment circuit
US Patent 7256629 Phase-locked loops
US Patent 7256630 System and method for PLL control
US Patent 7256635 Low lock time delay locked loops using time cycle suppressor
US Patent 7256636 Voltage controlled delay line (VCDL) having embedded multiplexer and interpolation functions
US Patent 7259606 Data sampling clock edge placement training for high speed GPU-memory interface
US Patent 7260118 Methods and systems for generating an accurate adaptive clock
US Patent 7262644 Method and apparatus for switching frequency of a system clock
US Patent 7262647 Delay locked loop circuit and signal delay locking method
US Patent 7265595 Stochastic reset circuit
US Patent 7265596 Data latch circuit of semiconductor device
US Patent 7268623 Low voltage differential signal driver circuit and method for controlling the same
US Patent 7271621 Method and apparatus for trimming a phase detector in a delay-locked-loop
US Patent 7271638 Delay circuit and delay synchronization loop device
US Patent 7274239 Method and apparatus to set a tuning range for an analog delay
US Patent 7274243 Adaptive gate drive for switching devices of inverter
US Patent 7276947 Delay circuit with reset-based forward path static delay
US Patent 7276955 Circuit and method for stable fuse detection
US Patent 7282974 Delay locked loop
US Patent 7282979 Phase shifting device
US Patent 7282982 Mixer-system with gain-blocks and switches
US Patent 7285996 Delay-locked loop
US Patent 7286000 Semiconductor device
US Patent 7286007 Configurable clock network for programmable logic device
US Patent 7288983 Method and circuit for providing a temperature dependent current source
US Patent 7289594 Shift registrer and driving method thereof
US Patent 7292078 Phase locked loop integrated circuits having fast locking characteristics and methods of operating same
US Patent 7292082 Digital duty cycle corrector for multi-phase clock application
US Patent 7292666 Time difference adjustment circuit
US Patent 7295057 Methods and apparatus for characterizing electronic fuses used to personalize an integrated circuit
US Patent 7295082 Pulse frequency modulation oscillating circuit for a DC/DC converter
US Patent 7298190 Phase locked loop having enhanced locking characteristics
US Patent 7298810 Multi-modulus programmable frequency divider
US Patent 7301379 Systems and method for a delay locked loop with false-lock detection
US Patent 7301383 Circuit for controlling phase with improved linearity of phase change
US Patent 7301384 Multimode, uniform-latency clock generation circuit
US Patent 7304510 Digital phase detector improving phase detection resolution thereof
US Patent 7304514 Methods and circuits for sensing on-chip voltage in powerup mode
US Patent 7304523 Clock generating apparatus and method in optical storage system
US Patent 7312648 Temperature sensor
US Patent 7315190 PWM circuit and PWM integrated circuit for use in PWM circuit
US Patent 7319349 Semiconductor integrated circuit
US Patent 7319350 Lock-detection circuit and PLL circuit using same
US Patent 7323918 Mutual-interpolating delay-locked loop for high-frequency multiphase clock generation
US Patent 7323919 Pulse-width modulation circuits of self-oscillation type and pulse-width modulation methods
US Patent 7323921 Clock generator, system on a chip integrated circuit and methods for use therewith
US Patent 7327175 Delay locked loop circuit in semiconductor device and its control method
US Patent 7327176 Delay circuit and delay synchronization loop device
US Patent 7327179 Pulse generator, optical disk writer and tuner
US Patent 7330059 In-loop duty corrector delay-locked loop for multiphase clock generation
US Patent 7330062 Input/output logical circuit
US Patent 7332940 Voltage hold circuit and clock synchronization circuit
US Patent 7336109 High voltage tolerant port driver
US Patent 7336111 Fast-locking digital phase locked loop
US Patent 7336112 False lock protection in a delay-locked loop (DLL)
US Patent 7336114 High-speed latching technique and application to frequency dividers
US Patent 7342430 Write strategy with multi-stage delay cell for providing stable delays on EFM clock
US Patent 7342434 Semiconductor device including capacitor having decoupling capacity
US Patent 7348813 Circuits and methods for reducing the effects of level shifter delays in systems operating in multiple voltage domains
US Patent 7348820 Method and apparatus for glitch-free control of a delay-locked loop in a network device
US Patent 7348822 Precisely adjusting a local clock
US Patent 7348837 Point diffusion signal distribution with minimized power consumption and signal skew
US Patent 7352214 System and method for clock detection with glitch rejection
US Patent 7352218 DLL circuit and method of controlling the same
US Patent 7352235 Current mirror
US Patent 7355458 Output driver circuit and a method of transmitting an electrical signal via an output driver circuit
US Patent 7355462 Phase lock loop and method for operating the same
US Patent 7358784 Delay locked loop
US Patent 7358785 Apparatus and method for extracting a maximum pulse width of a pulse width limiter
US Patent 7359475 Counter circuit and semiconductor device containing the same
US Patent 7362150 Method and system for synchronizing phase of triangular signal
US Patent 7362167 Voltage generator
US Patent 7365583 Delay locked loop for high speed semiconductor memory device
US Patent 7365584 Slew-rate control apparatus and methods for a power transistor to reduce voltage transients during inductive flyback
US Patent 7365587 Contention-free keeper circuit and a method for contention elimination
US Patent 7365593 Output equalized charge pump
US Patent 7365595 Internal voltage generator
US Patent 7366275 Output calibrator with dynamic precision
US Patent 7368962 Clock supply device
US Patent 7368967 Timing controller and controlled delay circuit for controlling timing or delay time of a signal by changing phase thereof
US Patent 7368980 Producing reference voltages using transistors
US Patent 7378888 Delay-locked loop circuit
US Patent 7378891 Measure-controlled circuit with frequency control
US Patent 7382169 Systems and methods for reducing static phase error
US Patent 7382171 Semiconductor circuit for detecting a signal propagation time
US Patent 7385428 Digital delay locked loop capable of correcting duty cycle and its method
US Patent 7391245 Delay locked loop and method for setting a delay chain
US Patent 7391246 Digital high speed programmable delayed locked loop
US Patent 7391248 Duty cycle corrector of delay locked loop
US Patent 7391251 Pre-emphasis and de-emphasis emulation and wave shaping using a programmable delay without using a clock
US Patent 7391253 Power saving semiconductor integrated circuit device
US Patent 7394297 Logic gate with reduced sub-threshold leak current
US Patent 7394303 Pulse generator using latch and control signal generator having the same
US Patent 7397293 Clock distribution circuit
US Patent 7397294 Charge pump clock generating circuit and method thereof
US Patent 7405601 High-speed divider with pulse-width control
US Patent 7405604 Variable delay clock circuit and method thereof
US Patent 7405607 Clock generation circuit capable of setting or controlling duty ratio of clock signal and system including clock generation circuit
US Patent 7405611 Semiconductor integrated circuit device
US Patent 7406147 Shift register
US Patent 7408392 PWM-to-voltage converter circuit and method
US Patent 7408393 Master-slave flip-flop and clocking scheme
US Patent 7411429 System and method for clock switching
US Patent 7411436 Self-timed thermally-aware circuits and methods of use thereof
US Patent 7414460 System and method for integrated circuit charge recycling
US Patent 7417480 Duty cycle correction circuit whose operation is largely independent of operating voltage and process
US Patent 7420398 Pulse extension circuits for extending pulse signals
US Patent 7423461 Phase synchronous circuit
US Patent 7423467 Circuit for controlling duty cycle distortion
US Patent 7423468 Duty correction circuit of digital type for optimal layout area and current consumption
US Patent 7423470 Pulse generator
US Patent 7423472 Power switching circuit
US Patent 7423476 Current mirror circuit having drain-source voltage clamp
US Patent 7425853 Systems and methods for pulse width modulating asymmetric signal levels
US Patent 7426253 Low latency counter event indication
US Patent 7427886 Clock generating method and circuit thereof
US Patent 7429884 Pulse-signaling circuits for networks on chip
US Patent 7432752 Duty cycle stabilizer
US Patent 7436226 Power-up detection circuit that operates stably regardless of variations in process, voltage, and temperature, and semiconductor device thereof
US Patent 7436232 Regenerative clock repeater
US Patent 7436923 Shift register circuit and image display apparatus containing the same
US Patent 7439787 Methods and apparatus for a digital pulse width modulator using multiple delay locked loops
US Patent 7443214 PLL circuit and frequency setting circuit using the same
US Patent 7443220 Phase shift circuit and phase correcting method
US Patent 7443944 Shift register, image display apparatus containing the same and signal generation circuit
US Patent 7446579 Semiconductor memory device having delay locked loop
US Patent 7446582 Phase angle control method
US Patent 7447292 Shift register and driving circuit and display device using the same
US Patent 7449930 Delay locked loop circuit
US Patent 7449931 Duty ratio adjustment
US Patent 7449932 Pulse generating circuit, electronic device using this pulse generating circuit, cellular phone set, personal computer, and information transmitting method using this circuit
US Patent 7453313 Charge pumping circuit
US Patent 7456665 Phase shifter
US Patent 7459949 Phase detector circuit and method therefor
US Patent 7459952 Clock signal generating device, generating method, and signal processing device
US Patent 7466167 Driver circuit for reducing the effects of disturbances on the duty cycle of a digital signal on a bus conductor
US Patent 7471131 Delay locked loop with common counter and method thereof
US Patent 7477099 Filter adjustment circuit
US Patent 7477715 Delay-locked loop circuit of a semiconductor device and method of controlling the same
US Patent 7479819 Clock distribution network, structure, and method for providing balanced loading in integrated circuit clock trees
US Patent 7482855 Circuit and method for stable fuse detection
US Patent 7486114 Signal detector with calibration circuit arrangement
US Patent 7486130 Clock skew compensation
US Patent 7489170 Delay locked loop in synchronous semiconductor memory device and driving method thereof
US Patent 7489758 Shift register apparatus and shift register thereof
US Patent 7492195 Agile, low phase noise clock synthesizer and jitter attenuator
US Patent 7492852 Fractional frequency divider
US Patent 7492853 Shift register and image display apparatus containing the same
US Patent 7495479 Sample and hold circuit and related data signal detecting method utilizing sample and hold circuit
US Patent 7495482 Semiconductor device
US Patent 7495485 Controllable current source for a phase locked loop
US Patent 7498871 Spectrum spreaders including tunable filters and related devices and methods
US Patent 7499517 Shift register and shift register set using the same
US Patent 7499519 Bidirectional shift register
US Patent 7501863 Voltage margining with a low power, high speed, input offset cancelling equalizer
US Patent 7501867 Power supply noise rejection in PLL or DLL circuits
US Patent 7501902 Phase-locked loop circuit and data reproduction apparatus
US Patent 7504875 Methods and apparatus for characterizing electronic fuses used to personalize an integrated circuit
US Patent 7508244 Tuning of a phase-locked loop, and an electronic device
US Patent 7511539 Driver circuit
US Patent 7511542 Frequency dividing circuit
US Patent 7511548 Clock distribution network, structure, and method for providing balanced loading in integrated circuit clock trees
US Patent 7514973 Circuit having a clock signal synchronizing device with capability to filter clock-jitter
US Patent 7514974 Method and apparatus for adjusting on-chip delay with power supply control
US Patent 7514985 Fast turn on and off speed in PLL cascoded charge pump
US Patent 7521974 Translational phase locked loop using a quantized interpolated edge timed synthesizer
US Patent 7521979 Ternary pulse generation circuit
US Patent 7525355 Digital delay locked loop
US Patent 7525356 Low-power, programmable multi-stage delay cell
US Patent 7525357 Circuit and method for adjusting a voltage drop
US Patent 7525359 Duty cycle correction amplification circuit
US Patent 7525360 I/O duty cycle and skew control
US Patent 7528632 Half bin linear frequency discriminator
US Patent 7528639 DLL circuit and method of controlling the same
US Patent 7528640 Digital pulse-width control apparatus
US Patent 7528645 Temperature dependent clamping of a transistor
US Patent 7529333 Shift register
US Patent 7532040 Programmable sensitivity frequency coincidence detection circuit and method
US Patent 7532051 Method and apparatus for selection of an internal or external time delay
US Patent 7532700 Space and power efficient hybrid counters array
US Patent 7532701 Shift register and driving method thereof
US Patent 7535276 Method of forming a PWM controller and structure therefor
US Patent 7538596 Low distortion quadrature mixer and method therefor
US Patent 7541850 PLL with low spurs
US Patent 7545187 PLL circuit and wireless device
US Patent 7545188 Multiphase clock generator
US Patent 7545190 Parallel multiplexing duty cycle adjustment circuit with programmable range control
US Patent 7545196 Clock distribution for specialized processing block in programmable logic device
US Patent 7551006 Low voltage differential signalling driver
US Patent 7551010 PLL circuit and design method thereof
US Patent 7554370 Method and system for synchronizing phase of triangular signal
US Patent 7555094 Counter capable of holding and outputting a count value and phase locked loop having the counter
US Patent 7557623 Circuit arrangement, in particular phase-locked loop, as well as corresponding method
US Patent 7557624 Fractional digital PLL
US Patent 7557625 Phase locked loop charge pump reference current bootstrapping
US Patent 7557629 Pulse stream generator
US Patent 7558144 Circuit for controlling pulse width of auto-refresh signal and circuit for generating internal row address for auto refresh
US Patent 7558361 Phase-switching dual modulus prescaler
US Patent 7564280 Phase locked loop with small size and improved performance
US Patent 7567099 Filterless digital frequency locked loop
US Patent 7567102 Delay locked loop circuit in semiconductor device and its control method
US Patent 7567104 Data sampling clock edge placement training for high speed GPU-memory interface
US Patent 7570105 Variable current charge pump with modular switch circuit
US Patent 7573326 Forwarded clock filtering
US Patent 7576580 Energy efficient clock deskew systems and methods
US Patent 7576614 Frequency independent control
US Patent 7577231 Clock multiplier structure for fixed speed testing of integrated circuits
US Patent 7579881 Write driver circuit
US Patent 7579887 Technique for efficiently managing both short-term and long-term frequency adjustments of an electronic circuit clock signal
US Patent 7579888 Frequency synthesizer and charge pump circuit used therein
US Patent 7579890 Duty detector and duty detection/correction circuit including the same and method thereof
US Patent 7579892 Accurate timing generator and method therefor
US Patent 7583117 Delay lock clock synthesizer and method thereof
US Patent 7583125 Methods and apparatus for pulse generation used in characterizing electronic fuses
US Patent 7583776 Portable multiplicity counter
US Patent 7586347 Clock generator with self-bias bandwidth control
US Patent 7586348 Systems, apparatuses and methods for synchronizing clock signals
US Patent 7586349 CMOS integrated circuit for correction of duty cycle of clock signal
US Patent 7586353 Electronic pulse-generating device
US Patent 7586354 Clock pin setting and clock driving circuit
US Patent 7595668 High speed dynamic frequency divider
US Patent 7595670 Electronic device and method for on chip skew measurement
US Patent 7598794 Well bias architecture for integrated circuit device
US Patent 7605621 Oscillating apparatus
US Patent 7605622 Delay locked loop circuit
US Patent 7605629 Adjusting circuit and method for delay circuit
US Patent 7605633 Level shift circuit which improved the blake down voltage
US Patent 7609095 System and method for maintaining device operation during clock signal adjustments
US Patent 7609104 Spread spectrum clock generator
US Patent 7612590 Oscillating apparatus
US Patent 7612595 Sequence independent non-overlapping digital signal generator with programmable delay
US Patent 7612596 Internal clock generator
US Patent 7616036 Programmable strobe and clock generator
US Patent 7619458 Delay-lock loop and method adapting itself to operate over a wide frequency range
US Patent 7622972 System and apparatus for generating ideal rise and fall time
US Patent 7626432 DLL circuit
US Patent 7626436 Automatic system clock detection system
US Patent 7629821 Semiconductor memory device
US Patent 7629823 Method and apparatus for pulse width modulation
US Patent 7629824 Duty correction circuit of digital type for optimal layout area and current consumption
US Patent 7633326 Timing controller and controlled delay circuit for controlling timing or delay time of a signal by changing phase thereof
US Patent 7633328 Mixer stage and method for mixing two signals having different frequencies
US Patent 7639055 PWM signal generator
US Patent 7642822 Analog phase-locked loop
US Patent 7646237 Configurable clock network for programmable logic device
US Patent 7649390 Delay locked loop for high speed semiconductor memory device
US Patent 7649396 Soft error rate hardened latch
US Patent 7649406 Short-circuit charge-sharing technique for integrated circuit devices
US Patent 7652512 Clock synchronizing circuit
US Patent 7652514 Internal clock driver circuit
US Patent 7652517 Method and apparatus for generating synchronous clock signals from a common clock signal
US Patent 7653170 Electrical circuit for measuring times and method for measuring times
US Patent 7656208 PLL oscillation circuit
US Patent 7656214 Spread-spectrum clock generator
US Patent 7656223 Delay locked loop circuit
US Patent 7659759 Phase synchronous circuit
US Patent 7659772 Semiconductor integrated circuit device
US Patent 7663411 Semiconductor device with a logic circuit
US Patent 7663420 MOS resistance controlling device and MOS attenuator
US Patent 7667510 Delay locked loop circuit and method thereof
US Patent 7667512 Duty cycle comparator
US Patent 7667531 Signal transmission circuit
US Patent 7671651 Duty cycle correction circuit of delay locked loop and delay locked loop having the duty cycle correction circuit
US Patent 7675332 Fractional delay-locked loops
US Patent 7675338 Duty cycle correction circuit whose operation is largely independent of operating voltage and process
US Patent 7683680 Combined phase comparator and charge pump circuit
US Patent 7688931 Space and power efficient hybrid counters array
US Patent 7688934 Shift register and shift register unit for diminishing clock coupling effect
US Patent 7692457 Dual-path clocking architecture
US Patent 7692465 Methods for generating PWM-signals
US Patent 7696803 Signal generating circuit
US Patent 7701271 High linearity charge pump method and apparatus
US Patent 7701280 Semiconductor integrated circuit device
US Patent 7702062 Electronic sensor with optimized counting capacity
US Patent 7705644 Broadband multi-phase output delay locked loop circuit utilizing a delay matrix
US Patent 7705647 Duty cycle correction circuit
US Patent 7705664 Current mirror circuit having drain-source voltage clamp
US Patent 7710165 Voltage-to-current converter
US Patent 7710170 Internal supply voltage controlled PLL and methods for using such
US Patent 7710171 Delayed locked loop circuit
US Patent 7710172 DLL circuit, semiconductor memory device using the same, and data processing system
US Patent 7710177 Latch device having low-power data retention
US Patent 7724050 Delay locked loop circuit and control method of the same
US Patent 7724052 Delay locked loop circuit
US Patent 7724056 Semiconductor integrated circuit device operating in synchronism with clock and method for controlling duty of clock
US Patent 7724067 Enhanced transmission gate
US Patent 7728635 High voltage tolerant port driver
US Patent 7728640 DLL circuit
US Patent 7728644 Skew compensation circuit
US Patent 7733150 Method and apparatus for adaptive clock phase control for LSI power reduction
US Patent 7733151 Operating clock generation system and method for audio applications
US Patent 7733152 Control signal generating circuit enabling value of period of a generated clock signal to be set as the period of a reference signal multiplied or divided by an arbitrary real number
US Patent 7737744 Register controlled delay locked loop circuit
US Patent 7746133 Charge pump circuit
US Patent 7746134 Digitally controlled delay-locked loops
US Patent 7746142 Circuit and method for clock skew compensation in voltage scaling
US Patent 7746180 Phase-locked loop circuit and data reproduction apparatus
US Patent 7750699 Delay locked loop circuit
US Patent 7755410 Semiconductor integrated circuit capable of overcoming clock signal jitter
US Patent 7759992 CML circuit and clock distribution circuit
US Patent 7768328 Semiconductor circuit
US Patent 7768334 Semiconductor integrated circuit
US Patent 7772903 Pulse width modulation circuit capable of linearly adjusting duty cycle with voltage and related method
US Patent 7772911 Timing control circuit and semiconductor storage device
US Patent 7772912 Level shift circuit and method thereof
US Patent 7777559 Reference voltage generator for analog-to-digital converter circuit
US Patent 7782104 Delay element array for time-to-digital converters
US Patent 7782111 Narrow pulse generator
US Patent 7782112 Device and method for generating clock signal
US Patent 7782995 Low latency counter event indication
US Patent 7786774 Phase synchronization apparatus
US Patent 7786783 Duty cycle correction circuit with reduced current consumption
US Patent 7795938 Apparatus and method for generating clock signal
US Patent 7800423 Duty correction circuit
US Patent 7804341 Level-restored for supply-regulated PLL
US Patent 7804343 Disturbance suppression capable charge pump
US Patent 7808290 Semiconductor integrated circuit and method of controlling the same
US Patent 7812653 Power supply noise rejection in PLL or DLL circuits
US Patent 7816961 System and method for signal adjustment
US Patent 7821316 Multiphase clock generator with enhanced phase control
US Patent 7825712 Multi-phase clock signal generating circuit having improved phase difference and a controlling method thereof
US Patent 7834675 Clock control circuit and semiconductor memory device using the same
US Patent 7839194 Clock circuitry for generating multiple clocks with time-multiplexed duty cycle adjustment
US Patent 7839196 Multi-phase clock generation circuit having a low skew imprecision
US Patent 7839199 Circuit and method for implementing frequency tripled I/Q signals
US Patent 7843228 Half bin linear frequency discriminator
US Patent 7843238 Circuit for discharging an electrical load, power output stage comprising such a discharge circuit for the control of plasma display cells, and related system and method
US Patent 7843242 Phase-shifted pulse width modulation signal generation
US Patent 7847609 Duty detecting circuit and duty cycle corrector including the same
US Patent 7852134 Circuit for controlling pulse width of auto-refresh signal and circuit for generating internal row address for auto refresh
US Patent 7852144 Current reference system and method
US Patent 7855584 Low lock time delay locked loops using time cycle suppressor
US Patent 7855586 Frequency jitter generator and PWM controller
US Patent 7855588 Clock signal generation apparatus
US Patent 7855669 Circuit device to generate a high precision control signal
US Patent 7859314 Method and system for a signal driver using capacitive feedback
US Patent 7859329 Configurable clock network for programmable logic device
US Patent 7863956 Pulse-elimination pulse-width modulation
US Patent 7864915 Low-power asynchronous counter and method
US Patent 7868669 Self-regulated charge pump with loop filter
US Patent 7868681 Programmable gain circuit
US Patent 7872505 Semiconductor apparatus and anomaly detection method of the same
US Patent 7872515 Phase interpolation device and slew rate control device thereof
US Patent 7876136 Phase-locked-loop circuit having a pre-calibration function and method of pre-calibrating the same
US Patent 7876143 Phase shifter
US Patent 7880519 Clock signal generating circuit, display panel module, imaging device, and electronic equipment
US Patent 7880520 Semiconductor integrated circuit
US Patent 7880523 Method and apparatus for pulse width modulation
US Patent 7884656 Phase locked loop with small size and improved performance
US Patent 7888983 Predetermined duty cycle signal generator
US Patent 7888990 Phase locked loop charge pump reference current bootstrapping
US Patent 7889832 Bootstrap circuit, shift register employing the same and display device
US Patent 7893725 Delay locked loop circuit
US Patent 7893741 Multiple-stage, signal edge alignment apparatus and methods
US Patent 7893744 Semiconductor device
US Patent 7893747 Control signal generation circuit
US Patent 7911248 Apparatus for linearization of digitally controlled oscillator
US Patent 7911253 Hybrid clock network
US Patent 7915935 Communication systems w/counter-based frequency centering for mm-wave frequency bands
US Patent 7915941 Phase interpolator circuits and methods
US Patent 7924075 Delay locked loop circuit and control method of the same
US Patent 7924076 Data recovery circuit
US Patent 7928784 Method and apparatus to improve and control the propagation delay in a current slewing circuit
US Patent 7928790 Integrated circuit and programmable delay
US Patent 7932761 Fine tuned pulse width modulation
US Patent 7936197 Programmable high-speed cable with boost device
US Patent 7940098 Fractional delay-locked loops
US Patent 7940100 Delay circuits matching delays of synchronous circuits
US Patent 7944262 Duty correction circuit
US Patent 7948290 Digital PLL device
US Patent 7952403 Update control apparatus in DLL circuit
US Patent 7952408 Embedded phase noise measurement system
US Patent 7961019 Delay-lock loop and method adapting itself to operate over a wide frequency range
US Patent 7961039 Forwarded clock filtering
US Patent RE42494 Preventing drain to body forward bias in a MOS transistor
US Patent 7969216 System and method for improved timing synchronization
US Patent 7969217 Output buffer with slew-rate enhancement output stage
US Patent 7973580 Semiconductor device
US Patent 7977987 System and method for signal adjustment
US Patent 7982512 Communication system communication device and method for determining duty ratio of PWM control
US Patent 7986168 Semiconductor apparatus and anomaly detection method of the same
US Patent 7986178 Pulse width modulation driver for electroactive lens
US Patent 7986179 Circuit and method for reducing popping sound
US Patent 7990192 Phase locked loop and method for charging phase locked loop
US Patent 7990195 Duty cycle correction circuits having short locking times that are relatively insensitive to temperature changes
US Patent 7990197 Internal clock driver circuit
US Patent 7990747 Semiconductor chip and semiconductor device
US Patent 7994833 Delay locked loop for high speed semiconductor memory device
US Patent 7994835 Duty control circuit and semiconductor device having the same
US Patent 7994837 Techniques for phase interpolation
US Patent 7999588 Duty cycle correction circuitry
US Patent 7999589 Circuits and methods for clock signal duty-cycle correction
US Patent 8004330 Reduction of electromagnetic interference for differential signals
US Patent 8004335 Phase interpolator system and associated methods
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US Patent 8004335 Phase interpolator system and associated methods
Golden AI
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Patent primary examiner of
US Patent 8004330 Reduction of electromagnetic interference for differential signals
Golden AI
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Patent primary examiner of
US Patent 7999589 Circuits and methods for clock signal duty-cycle correction
Golden AI
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Patent primary examiner of
US Patent 7999588 Duty cycle correction circuitry
Golden AI
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US Patent 7994837 Techniques for phase interpolation
Golden AI
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US Patent 7994835 Duty control circuit and semiconductor device having the same
Golden AI
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US Patent 7994833 Delay locked loop for high speed semiconductor memory device
Golden AI
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US Patent 7990747 Semiconductor chip and semiconductor device
Golden AI
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Patent primary examiner of
US Patent 7990195 Duty cycle correction circuits having short locking times that are relatively insensitive to temperature changes
Golden AI
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Patent primary examiner of
US Patent 7990197 Internal clock driver circuit
Golden AI
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Patent primary examiner of
US Patent 7990192 Phase locked loop and method for charging phase locked loop
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Golden AI
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Patent primary examiner of
US Patent 7986179 Circuit and method for reducing popping sound
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7986178 Pulse width modulation driver for electroactive lens
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7986168 Semiconductor apparatus and anomaly detection method of the same
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7982512 Communication system communication device and method for determining duty ratio of PWM control
Golden AI
edited on 8 Dec, 2021
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US Patent 7977987 System and method for signal adjustment
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