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Dang T Nguyen
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Edits on 15 Dec, 2021
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Golden AI
edited on 15 Dec, 2021
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Patent primary examiner of
US Patent 7385849 Semiconductor integrated circuit device
US Patent 7403427 Method and apparatus for reducing stress in word line driver transistors during erasure
US Patent 7408806 Memory array architecture for a memory device and method of operating the memory array architecture
US Patent 7411813 Semiconductor device
US Patent 7414909 Nonvolatile semiconductor memory
US Patent 7414913 Bitline twisting scheme for multiport memory
US Patent 7417881 Low power content addressable memory
US Patent 7417890 Semiconductor memory device
US Patent 7423905 Read-only memory using linear passive elements
US Patent 7430134 Memory cell structure of SRAM
US Patent 7433242 Semiconductor memory device and driving method of the same
US Patent 7436710 EEPROM memory device with cell having NMOS in a P pocket as a control gate, PMOS program/erase transistor, and PMOS access transistor in a common well
US Patent 7436720 Semiconductor memory device
US Patent 7443722 Semiconductor device and driving method therefor
US Patent 7443741 DQS strobe centering (data eye training) method
US Patent 7447071 Low voltage column decoder sharing a memory array p-well
US Patent 7447111 Counter control signal generating circuit
US Patent 7450428 Reading circuit and method for a nonvolatile memory device
US Patent 7450434 Semiconductor device and its control method
US Patent 7450435 Systems for comprehensive erase verification in non-volatile memory
US Patent 7450449 Semiconductor memory device and its test method
US Patent 7450466 Data input device of semiconductor memory device
US Patent 7457154 High density memory array system
US Patent 7457164 Semiconductor memory device and electronic apparatus
US Patent 7457178 Trimming of analog voltages in flash memory devices
US Patent 7457186 Semiconductor memory device
US Patent 7457190 Data latch controller of synchronous memory device
US Patent 7457191 Apparatus and method of generating output enable signal for semiconductor memory apparatus
US Patent 7457192 Semiconductor memory device and module for high frequency operation
US Patent 7460383 Storage apparatus, controller and control method
US Patent 7460405 Method for controlling nonvolatile memory device
US Patent 7460408 Semiconductor memory device of single-bit-line drive type
US Patent 7460417 Semiconductor device, semiconductor memory device and data strobe method
US Patent 7460427 Semiconductor integrated circuit device
US Patent 7463505 Semiconductor memory device and electronic apparatus
US Patent 7463516 Flash memories with adaptive reference voltages
US Patent 7463532 Comprehensive erase verification for non-volatile memory
US Patent 7466576 Technique for CAM width expansion using an external priority encoder
US Patent 7466579 Field effect device with a channel with a switchable conductivity
US Patent 7466597 NAND flash memory device and copyback program method for same
US Patent 7466605 Semiconductor device and control method therefor
US Patent 7468902 SRAM device with a low operation voltage
US Patent 7474576 Repairing Advanced-Memory Buffer (AMB) with redundant memory buffer for repairing DRAM on a fully-buffered memory-module
US Patent 7477553 Control device for controlling a buffer memory
US Patent 7477559 Sense amplifier for low-voltage applications
US Patent 7477564 Method and apparatus for redundant memory configuration in voltage island
US Patent 7480188 Memory Access apparatus
US Patent 7480200 Semiconductor memory device suitable for mounting on portable terminal
US Patent 7483283 Apparatus for efficient streaming data access on reconfigurable hardware and method for automatic generation thereof
US Patent 7483322 Ring oscillator row circuit for evaluating memory cell performance
US Patent 7489542 Systems for variable reading in non-volatile memory
US Patent 7489552 Semiconductor integrated circuit device
US Patent 7489559 Recursive device for switching over a high potential greater than a nominal potential of a technology in which the device is made and related system and method
US Patent 7495943 Semiconductor memory device
US Patent 7495968 Wired-or typed page buffer having cache function in a nonvolatile memory device and related method of programming
US Patent 7499302 Noise reduction in a CAM memory cell
US Patent 7502259 On-chip data grouping and alignment
US Patent 7505306 Magnetic memory device
US Patent 7505326 Programming pulse generator
US Patent 7508720 Systems for comprehensive erase verification in non-volatile memory
US Patent 7508729 Oscillator circuit generating oscillating signal having stable cycle
US Patent 7512014 Comprehensive erase verification for non-volatile memory
US Patent 7512015 Negative voltage blocking for embedded memories
US Patent 7515494 Refresh period adjustment technique for dynamic random access memories (DRAM) and integrated circuit devices incorporating embedded DRAM
US Patent 7518177 Semiconductor storage device
US Patent 7518910 Variable reading of non-volatile memory
US Patent 7518936 Semiconductor integrated circuit device and inspection method of the same
US Patent 7525830 Nonvolatile ferroelectric perpendicular electrode cell, FeRAM having the cell and method for manufacturing the cell
US Patent 7532505 Method and system for using a pulsed field to assist spin transfer induced switching of magnetic memory elements
US Patent 7535742 Biasing and shielding circuit for source side sensing memory
US Patent 7535769 Time-dependent compensation currents in non-volatile memory read operations
US Patent 7535788 Dynamic power control for expanding SRAM write margin
US Patent 7539033 Semiconductor memory device
US Patent 7548479 Semiconductor memory device and manufacturing method thereof
US Patent 7551511 NAND flash memory device and method of forming a well of a NAND flash memory device
US Patent 7554855 Hybrid solid-state memory system having volatile and non-volatile memory
US Patent 7558121 Flash memory device and smart card including the same
US Patent 7567449 One-time-programmable logic bit with multiple logic elements
US Patent 7567453 Advanced multi-bit magnetic random access memory device
US Patent 7567461 Method and system for minimizing number of programming pulses used to program rows of non-volatile memory cells
US Patent 7567483 Semiconductor memory device and method for operating the same
US Patent 7570518 Concurrent programming of non-volatile memory
US Patent 7570528 Precharge voltage supply circuit and semiconductor device using the same
US Patent 7573738 Mode selection in a flash memory device
US Patent 7573749 Counteracting overtunneling in nonvolatile memory cells
US Patent 7577056 System and method for using a DLL for signal timing control in a eDRAM
US Patent 7580287 Program and read trim setting
US Patent 7580314 Memory device having open bit line structure and method of sensing data therefrom
US Patent 7583531 Reverse coupling effect with timing information
US Patent 7583553 Semiconductor memory and refresh cycle control method
US Patent 7596036 Memory control circuit, microcomputer, and data rewriting method
US Patent 7599243 Sense amplifier over driver control circuit and method for controlling sense amplifier of semiconductor device
US Patent 7606068 Memory with a core-based virtual ground and dynamic reference sensing scheme
US Patent 7609558 Non-volatile semiconductor memory device
US Patent 7609572 Semiconductor memory device
US Patent 7609579 Memory module with failed memory cell repair function and method thereof
US Patent 7613064 Power management modes for memory devices
US Patent 7616470 Method for achieving very high bandwidth between the levels of a cache hierarchy in 3-dimensional structures, and a 3-dimensional structure resulting therefrom
US Patent 7619923 Apparatus for reducing leakage in global bit-line architectures
US Patent 7619934 Method and apparatus for adaptive memory cell overerase compensation
US Patent 7619938 Repairing advanced-memory buffer (AMB) with redundant memory buffer for repairing DRAM on a fully-buffered memory-module
US Patent 7619945 Memory power management
US Patent 7623376 Flash memory device with multi level cell and burst access method therein
US Patent 7626855 Semiconductor memory device
US Patent 7626862 Semiconductor memory device
US Patent 7626876 Semiconductor memory device and its test method
US Patent 7630226 Semiconductor device
US Patent 7630229 Semiconductor memory device
US Patent 7630231 Hybrid memory cell for spin-polarized electron current induced switching and writing/reading process using such memory cell
US Patent 7630238 Page buffer for multi-level NAND electrically-programmable semiconductor memories
US Patent 7630261 Nand-structured flash memory
US Patent 7630275 Latency counter
US Patent 7633808 Flash memories with adaptive reference voltages
US Patent 7639542 Maintenance operations for multi-level data storage cells
US Patent 7643347 Semiconductor memory device
US Patent 7643356 Semiconductor memory device having input device
US Patent 7646635 Data reading circuit of toggle magnetic memory
US Patent 7652915 High density spin torque three dimensional (3D) memory arrays addressed with microwave current
US Patent 7652930 Method, circuit and system for erasing one or more non-volatile memory cells
US Patent 7652938 Methods and systems for generating latch clock used in memory reading
US Patent 7656713 Non-volatile memory read operations using compensation currents
US Patent 7656717 Memory device having latch for charging or discharging data input/output line
US Patent 7656726 Memory with improved BIST
US Patent 7660142 Device with memory and method of operating device
US Patent 7663908 Method for increasing retention time in DRAM
US Patent 7663953 Method for high speed sensing for extra low voltage DRAM
US Patent 7663956 Semiconductor memory device
US Patent 7675772 Multilevel memory cell operation
US Patent 7675782 Method, system and circuit for programming a non-volatile memory array
US Patent 7675785 Semiconductor storage device
US Patent 7675792 Generating reference currents compensated for process variation in non-volatile memories
US Patent 7679985 Semiconductor memory device and arrangement method thereof
US Patent 7679986 Data latch controller of synchronous memory device
US Patent 7688655 Semiconductor memory device and test method therefor
US Patent 7688665 Structure to share internally generated voltages between chips in MCP
US Patent 7692955 Semiconductor integrated circuit
US Patent 7692964 Source-biased SRAM cell with reduced memory cell leakage
US Patent 7692991 Semiconductor memory device and method for designing the same
US Patent 7697311 Storage apparatus, controller and control method
US Patent 7697340 Methods and apparatuses for trimming reference cells in semiconductor memory devices
US Patent 7697346 Data input/output circuit and method of semiconductor memory apparatus
US Patent 7697350 Low couple effect bit-line voltage generator
US Patent 7697352 Read-and-write assembly for fixed-address digital data access system
US Patent 7701744 Method of arranging fuses in a fuse box of a semiconductor memory device and a semiconductor memory device including such an arrangement
US Patent 7701778 Nonvolatile semiconductor memory device
US Patent 7701797 Two levels of voltage regulation supplied for logic and data programming voltage of a memory device
US Patent 7706171 Storage device
US Patent 7706208 Semiconductor memory device
US Patent 7710759 Nonvolatile ferroelectric memory device
US Patent 7710768 Electromechanical memory, electric circuit using the same, and method of driving electromechanical memory
US Patent 7715255 Programmable chip enable and chip address in semiconductor memory
US Patent 7719871 Methods of operating and manufacturing logic device and semiconductor device including complementary nonvolatile memory device, and reading circuit for the same
US Patent 7724595 Current-mode sense amplifier and sense amplifying method
US Patent 7724604 Clock and power fault detection for memory modules
US Patent 7729149 Content addressable memory cell including a junction field effect transistor
US Patent 7729170 Semiconductor device and its control method
US Patent 7733683 Semiconductor memory device
US Patent 7733715 Memory system, memory device, and output data strobe signal generating method
US Patent 7738281 Semiconductor storage device
US Patent 7738282 Cell structure of dual port SRAM
US Patent 7751268 Sense amplifier power supply circuit
US Patent 7751274 Extended synchronized clock
US Patent 7755959 Semiconductor memory device with reduced number of channels for test operation
US Patent 7760531 Semiconductor module
US Patent 7760533 Systems, methods and devices for arbitrating die stack position in a multi-bit stack device
US Patent 7760547 Offset non-volatile storage
US Patent 7760570 Semiconductor device having variable parameter selection based on temperature and test method
US Patent 7760572 Semiconductor memory device and refresh control method
US Patent 7764540 Semiconductor memory device
US Patent 7764564 Semiconductor device
US Patent 7773403 Spacer patterns using assist layer for high density semiconductor devices
US Patent 7778057 PCB circuit modification from multiple to individual chip enable signals
US Patent 7778058 Flash memory device which includes strapping line connected to selection line
US Patent 7778077 Non-volatile memory system with end of life calculation
US Patent 7778093 Memory control circuit capable of dynamically adjusting deglitch windows, and related method
US Patent 7782649 Using controlled bias voltage for data retention enhancement in a ferroelectric media
US Patent 7782650 Nonvolatile nanotube diodes and nonvolatile nanotube blocks and systems using same and methods of making same
US Patent 7782653 Semiconductor memory device and method of operating the semiconductor memory device
US Patent 7782680 Flash memory device having a verify data buffer capable of being employed as a program data buffer, and a method thereof
US Patent 7782683 Multi-port memory device for buffering between hosts and non-volatile memory devices
US Patent 7787287 Magnetic storage device with curved interconnects
US Patent 7787310 Circuits, devices, systems, and methods of operation for capturing data signals
US Patent 7787326 Programmable logic device with a multi-data rate SDRAM interface
US Patent 7791918 Stack position location identification for memory stacked packages
US Patent 7791941 Non-volatile SRAM cell
US Patent 7791951 Methods of operating non-volatile memory device
US Patent 7791955 Method of erasing a block of memory cells
US Patent 7791958 Pseudo differential output buffer, memory chip and memory system
US Patent 7791959 Memory integrated circuit device providing improved operation speed at lower temperature
US Patent 7791963 Semiconductor memory device and operation method thereof
US Patent 7796419 Magnetic memory
US Patent 7796444 Concurrent programming of non-volatile memory
US Patent 7796457 Motherboard with voltage regulator supporting DDR2 memory modules and DDR3 memory modules
US Patent 7796460 Nonvolatile semiconductor memory device
US Patent 7796463 Self-feedback control pipeline architecture for memory read path applications
US Patent 7800936 Latch-based random access memory
US Patent 7800937 Method for switching magnetic moment in magnetoresistive random access memory with low current
US Patent 7800960 Voltage generator for nonvolatile memory and writing and erasing method of nonvolatile memory
US Patent 7804723 Semiconductor memory device with signal aligning circuit
US Patent 7804724 Method and apparatus for boundary scan programming of memory devices
US Patent 7808846 Semiconductor memory device
US Patent 7808857 Analog memory
US Patent 7813178 Semiconductor memory device and write control method therefor
US Patent 7817458 Hybrid circuit having nanotube memory cells
US Patent 7817483 Memory device having terminals for transferring multiple types of data
US Patent 7821833 Semiconductor device and its control method
US Patent 7821835 Concurrent programming of non-volatile memory
US Patent 7826243 Multiple chip module and package stacking for storage devices
US Patent 7826254 Magnetic storage device and method for producing the same
US Patent 7826269 Flash memory device and method for driving the same
US Patent 7826277 Non-volatile memory device and method of operating the same
US Patent 7830691 Low power content addressable memory
US Patent 7830703 Semiconductor device and manufacturing method thereof
US Patent 7830707 Method of reading dual-bit memory cell
US Patent 7830713 Bit line gate transistor structure for a multilevel, dual-sided nonvolatile memory cell NAND flash array
US Patent 7830729 Digital filters with memory
US Patent 7835170 Memory elements and cross point switches and arrays of same using nonvolatile nanotube blocks
US Patent 7835184 EEPROM memory cell with first-dopant-type control gate transister, and second-dopant type program/erase and access transistors formed in common well
US Patent 7835185 Nonvolatile semiconductor memory device
US Patent 7835186 Method of programming a selected memory cell
US Patent 7835196 Nonvolatile memory device storing data based on change in transistor characteristics
US Patent 7835210 Magnetic random access memory and data read method of the same
US Patent 7839695 High temperature methods for enhancing retention characteristics of memory devices
US Patent 7839705 Semiconductor memory device and operation method of the same
US Patent 7848144 Reverse order page writing in flash memories
US Patent 7852673 Method for operating nonvolatitle memory array
US Patent 7852690 Multi-chip package for a flash memory
US Patent 7852695 Single-ended differential signal amplification and data reading
US Patent 7855912 Circuit and method for multiple-level programming, reading, and erasing dual-sided nonvolatile memory cell
US Patent 7859934 Method and apparatus for redundant memory configuration in voltage island
US Patent 7864604 Multiple address outputs for programming the memory register set differently for different DRAM devices
US Patent 7864607 Negative voltage discharge scheme to improve snapback in a non-volatile memory
US Patent 7869291 Precharge voltage supply circuit and semiconductor device using the same
US Patent 7872897 Programmable semiconductor device
US Patent 7872905 Method and apparatus for write enable and inhibit for high density spin torque three dimensional (3D) memory arrays
US Patent 7872925 Wired-or typed page buffer having cache function in a nonvolatile memory device and related method of programming
US Patent 7872932 Method of precharging local input/output line and semiconductor memory device using the method
US Patent 7872939 Semiconductor memory device
US Patent 7872940 Semiconductor memory device and method for testing the same
US Patent 7876611 Compensating for coupling during read operations in non-volatile storage
US Patent 7876629 Memory control methods capable of dynamically adjusting sampling points, and related circuits
US Patent 7881088 Content addressable memory device
US Patent 7881108 Maintenance operations for multi-level data storage cells
US Patent 7881135 Method for Q
US Patent 7881146 Semiconductor memory apparatus capable of selectively providing decoded row address
US Patent 7881150 Circuit providing load isolation and memory domain translation for memory module
US Patent 7889593 Method and apparatus for generating a sequence of clock signals
US Patent 7894246 Magnetoresistive element and magnetic memory
US Patent 7894255 Thyristor based memory cell
US Patent 7894257 Low voltage low cost non-volatile memory
US Patent 7894258 Flash memory device for determining most significant bit program
US Patent 7894264 Controlling a memory device responsive to degradation
US Patent 7894275 Methods of communicating data using inversion and related systems
US Patent 7898858 Memory module
US Patent 7903498 Y-decoder and decoding method thereof
US Patent 7907433 Semiconductor memory device and method of performing data reduction test
US Patent 7916535 Data encoding approach for implementing robust non-volatile memories
US Patent 7916540 Non-volatile memory devices and systems including bad blocks address re-mapped and methods of operating the same
US Patent 7916551 Method of programming cell in memory and memory apparatus utilizing the method
US Patent 7920435 Semiconductor memory device
US Patent 7924615 Nonvolatile semiconductor memory device
US Patent 7924631 Memory card and non-volatile memory controller thereof
US Patent 7924635 Hybrid solid-state memory system having volatile and non-volatile memory
US Patent 7924641 Data flow scheme for low power DRAM
US Patent 7929348 Non-volatile semiconductor memory device
US Patent 7929353 Method and apparatus for adaptive memory cell overerase compensation
US Patent 7940553 Method of storing an indication of whether a memory location in phase change memory needs programming
US Patent 7940585 Multi-column decoder stress test circuit
US Patent 7948802 Sensing memory cells
US Patent 7948809 Regulator and semiconductor device
US Patent 7948810 Positive and negative voltage level shifter circuit
US Patent 7948815 Semiconductor memory device and reset control circuit of the same
US Patent 7952939 Circuit and method for VDD-tracking CVDD voltage supply
US Patent 7957176 Semiconductor memory device with improved resistance to disturbance and improved writing characteristic
US Patent 7961517 Program and read trim setting
US Patent 7961522 Method and system for minimizing number of programming pulses used to program rows of non-volatile memory cells
US Patent 7961543 Semiconductor memory device and refresh control method
US Patent 7969792 Data strobe clock buffer in semiconductor memory apparatus, method of controlling the same, and semiconductor apparatus having the same
US Patent 7969802 Apparatus and method of generating output enable signal for semiconductor memory apparatus
US Patent 7974133 Robust sensing circuit and method
US Patent 7978525 Data flow scheme for low power DRAM
US Patent 7978535 Data input/output circuit and method of semiconductor memory apparatus
US Patent 7978548 Block decoding circuits of semiconductor memory devices and methods of operating the same
US Patent 7983103 Semiconductor memory device suitable for mounting on portable terminal
US Patent 7986543 Method for achieving very high bandwidth between the levels of a cache hierarchy in 3-dimensional structures, and a 3-dimensional structure resulting therefrom
US Patent 7990777 Method, apparatus and system for transmitting data in semiconductor device
US Patent 7995370 Semiconductor memory device and electronic apparatus
US Patent 7995415 System and method for reducing power consumption during extended refresh periods of dynamic random access memory devices
US Patent 8000141 Compensation for voltage drifts in analog memory cells
US Patent 8000161 Method and system for encoding to eliminate parasitics in crossbar array memories
US Patent 8004904 Semiconductor integrated circuit device
US Patent 8004911 Memory system, memory device, and output data strobe signal generating method
US Patent 8004921 Memory device, memory controller and memory system
US Patent 8004923 Semiconductor device including internal voltage generation circuit
US Patent 8009456 Resistance change type memory
US Patent 8009468 Method for fabricating an integrated circuit including memory element with spatially stable material
US Patent 8009482 High temperature methods for enhancing retention characteristics of memory devices
US Patent 8009486 Semiconductor integrated circuit for generating clock signals
Edits on 8 Dec, 2021
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 8009486 Semiconductor integrated circuit for generating clock signals
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 8009468 Method for fabricating an integrated circuit including memory element with spatially stable material
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 8009482 High temperature methods for enhancing retention characteristics of memory devices
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 8009456 Resistance change type memory
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 8004921 Memory device, memory controller and memory system
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 8004923 Semiconductor device including internal voltage generation circuit
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 8004904 Semiconductor integrated circuit device
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 8004911 Memory system, memory device, and output data strobe signal generating method
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 8000161 Method and system for encoding to eliminate parasitics in crossbar array memories
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 8000141 Compensation for voltage drifts in analog memory cells
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7995415 System and method for reducing power consumption during extended refresh periods of dynamic random access memory devices
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7995370 Semiconductor memory device and electronic apparatus
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7990777 Method, apparatus and system for transmitting data in semiconductor device
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7986543 Method for achieving very high bandwidth between the levels of a cache hierarchy in 3-dimensional structures, and a 3-dimensional structure resulting therefrom
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7983103 Semiconductor memory device suitable for mounting on portable terminal
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7978548 Block decoding circuits of semiconductor memory devices and methods of operating the same
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7978535 Data input/output circuit and method of semiconductor memory apparatus
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7978525 Data flow scheme for low power DRAM
Edits on 8 Dec, 2021
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7974133 Robust sensing circuit and method
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