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Leon Viet Q Nguyen

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Patent primary examiner of
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US Patent 11170485 Method, apparatus, and system for automatic quality assessment of cross view feature correspondences using bundle adjustment techniques
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US Patent 11170841 Apparatus with extended digit lines and methods for operating the same
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US Patent 11170856 Memory device and a storage system using the same
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US Patent 7088156 Delay-locked loop having a pre-shift phase detector
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US Patent 7088614 Programming method for a multilevel memory cell
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US Patent 7088615 Multi-state memory
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US Patent 7088625 Distributed write data drivers for burst access memories
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US Patent 7092274 Ferroelectric memory device
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US Patent 7099172 Static content addressable memory cell
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US Patent 7099175 Semiconductor memory integrated circuit
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US Patent 7099195 Methods for neutralizing holes in tunnel oxides of floating-gate memory cells and devices
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US Patent 7099220 Methods for erasing flash memory
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US Patent 7106615 FeRAM capable of restoring “0” data and “1” data at a time
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US Patent 7110281 Memory cells utilizing metal-to-metal capacitors to reduce susceptibility to single event upsets
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US Patent 7110291 Nano tube cell, and semiconductor device having nano tube cell and double bit line sensing structure
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US Patent 7110304 Dual port memory array using shared write drivers and read sense amplifiers
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US Patent 7110319 Memory devices having reduced coupling noise between wordlines
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US Patent 7112354 Electron spin mechanisms for inducing magnetic-polarization reversal
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US Patent 7113435 Data compression read mode for memory testing
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US Patent 7120068 Column/row redundancy architecture using latches programmed from a look up table
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US Patent 7120069 Electronic circuit package
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US Patent 7120070 Method for testing the serviceability of bit lines in a DRAM memory device
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US Patent 7123498 Non-volatile memory device
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US Patent 7123503 Writing to ferroelectric memory devices
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US Patent 7123519 Storage device employing a flash memory
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US Patent 7123541 Memory with address management
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US Patent 7126834 Sense amplifier architecture for content addressable memory device
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US Patent 7126843 Semiconductor memory device using magnetoresistive effect
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US Patent 7126874 Memory system and method for strobing data, command and address signals
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US Patent 7130207 Methods and memory structures using tunnel-junction device as control element
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US Patent 7130208 Ferroelectric-type nonvolatile semiconductor memory
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US Patent 7130229 Interleaved mirrored memory systems
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US Patent 7130239 Memory system, method and predecoding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous writing or erasure
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US Patent 7133323 Memory system, method and predecoding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous writing or erasure
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US Patent 11176359 Motion recognition device and motion recognition method
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US Patent 11176659 Estimation using image analysis
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US Patent 11176720 Computer program, image processing method, and image processing apparatus
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US Patent 7136316 Method and apparatus for data compression in memory devices
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US Patent 7142469 Circuit for controlling an enabling time of an internal control signal according to an operating frequency of a memory device and the method thereof
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US Patent 7145802 Programming and manufacturing method for split gate memory cell
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US Patent 7145811 Semiconductor storage device
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US Patent 7149135 Multi chip package type memory system and a replacement method of replacing a defect therein
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US Patent 7149145 Delay stage-interweaved analog DLL/PLL
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US Patent 7151707 Memory device and method having data path with multiple prefetch I/O configurations
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US Patent 7151713 Semiconductor memory device
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US Patent 7154803 Redundancy scheme for a memory integrated circuit
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US Patent 7154805 Storage device employing a flash memory
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US Patent 7158004 Integrated circuit inductors
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US Patent 7158410 Integrated DRAM-NVRAM multi-level memory
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US Patent 7158444 Semiconductor memory device
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US Patent 7161838 Thin film transistor memory device
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US Patent 7161866 Memory device tester and method for testing reduced power states
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US Patent 7161870 Synchronous flash memory command sequence
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US Patent 7164597 Computer systems
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US Patent 7167404 Method and device for testing configuration memory cells in programmable logic devices (PLDS)
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US Patent 7170778 High speed low power magnetic devices based on current induced spin-momentum transfer
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US Patent 7170792 Semiconductor device
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US Patent 7173841 Magnetic memory array
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US Patent 7173842 Metal heater for in situ heating and crystallization of ferroelectric polymer memory film
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US Patent 7173843 Serial diode cell and nonvolatile memory device using the same
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US Patent 7173849 Method of programming and erasing multi-level flash memory
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US Patent 7173857 Nonvolatile semiconductor memory device capable of uniformly inputting/outputting data
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US Patent 7173877 Memory system with two clock lines and a memory device
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US Patent 7177225 Block redundancy implementation in heirarchical RAM'S
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US Patent 7177228 Apparatus and method for controlling enable time of signal controlling operation of data buses of memory device
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US Patent 7180774 Semiconductor integrated circuit device including first, second and third gates
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US Patent 7180787 Semiconductor memory device
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US Patent 7180793 Semiconductor non-volatile storage device
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US Patent 7180796 Boosted voltage generating circuit and semiconductor memory device having the same
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US Patent 7180803 Data compression read mode for memory testing
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US Patent 7184290 Logic process DRAM
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US Patent 7184294 Ferroelectric-type nonvolatile semiconductor memory
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US Patent 7184320 Storage device employing a flash memory
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US Patent 7185143 SAN/NAS integrated storage system
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US Patent 7187592 Multi-state memory
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US Patent 7187617 Memory system and method for strobing data, command and address signals
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US Patent 7190616 In-service reconfigurable DRAM and flash memory device
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US Patent 7190617 Flash EEprom system
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US Patent 7190624 Flash memory device capable of preventing an over-erase of flash memory cells and erase method thereof
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US Patent 7190625 Method and apparatus for data compression in memory devices
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US Patent 7196921 High-speed and low-power differential non-volatile content addressable memory cell and array
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US Patent 7196929 Method for operating a memory device having an amorphous silicon carbide gate insulator
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US Patent 7196958 Power efficient memory and cards
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US Patent 7200024 System and method for optically interconnecting memory devices
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US Patent 7200038 Nonvolatile memory structure
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US Patent 7200048 Flash memory
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US Patent 7200062 Method and system for reducing the peak current in refreshing dynamic random access memory devices
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US Patent 7203098 Methods of erasing flash memory
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US Patent 7203120 Boosted voltage generating circuit and semiconductor memory device having the same
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US Patent 7206212 Content addressable memory (CAM) device with entries having ternary match and range compare functions
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US Patent 7209378 Columnar 1T-N memory cell structure
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US Patent 7209403 Enhanced fuse configurations for low-voltage flash memories
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US Patent 7212432 Resistive memory cell random access memory device and method of fabrication
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US Patent 7215572 Methods for neutralizing holes in tunnel oxides of floating-gate memory cells and devices
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US Patent 7215580 Non-volatile memory control
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US Patent 7218564 Dual equalization devices for long data line pairs
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US Patent 7221577 Bus twisting scheme for distributed coupling and low power
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US Patent 7221605 Switched capacitor DRAM sense amplifier with immunity to mismatch and offsets
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US Patent 7224614 Methods for improved program-verify operations in non-volatile memories
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US Patent 7224615 Non-volatile semiconductor memory device adapted to store a multi-valued in a single memory cell
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US Patent 7224636 Semiconductor memory module
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US Patent 7227768 Power interconnect structure for balanced bitline capacitance in a memory array
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US Patent 7227770 Ferroelectric-type nonvolatile semiconductor memory
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US Patent 7227794 Internal voltage generation control circuit and internal voltage generation circuit using the same
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US Patent 7230857 Methods of modifying operational characteristic of memory devices using control bits received through data pins and related devices and systems
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US Patent 7233517 Atomic probes and media for high density data storage
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US Patent 7233534 Electronic circuit package
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US Patent 7236387 Writing to ferroelectric memory devices
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US Patent 7236415 Sample and hold memory sense amplifier
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US Patent 7239575 Delay-locked loop having a pre-shift phase detector
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US Patent 7245528 Semiconductor memory device which stores plural data in a cell
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US Patent 7245553 Memory system and method for strobing data, command and address signals
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US Patent 7248516 Data compression read mode for memory testing
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US Patent 7248655 Digital radio receiver
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US Patent 7251165 Semiconductor flash memory
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US Patent 7251184 Semiconductor memory device
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US Patent 7251187 Memory system, method and predecoding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous writing or erasure
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US Patent 7251194 Memory system and method for strobing data, command and address signals
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US Patent 7254064 Flash memory device having multi-level cell and reading and programming method thereof
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US Patent 7259996 Flash memory
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US Patent 7262991 Nanotube- and nanocrystal-based non-volatile memory
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US Patent 7266038 Method for activating and deactivating electronic circuit units and circuit arrangement for carrying out the method
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US Patent 7269040 Static content addressable memory cell
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US Patent 7269067 Programming a memory device
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US Patent 7269094 Memory system and method for strobing data, command and address signals
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US Patent 7272044 Flash memory
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US Patent 7277326 Methods for erasing flash memory
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US Patent 7277327 Methods for erasing flash memory
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US Patent 7277328 Methods for neutralizing holes in tunnel oxides in tunnel oxides of floating-gate memory cells and devices
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US Patent 7277334 Method and apparatus for synchronization of row and column access operations
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US Patent 7277352 DRAM power bus control
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US Patent 7280381 Apparatus and methods for optically-coupled memory systems
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US Patent 7280382 Apparatus and methods for optically-coupled memory systems
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US Patent 7280395 Methods for neutralizing holes in tunnel oxides of floating-gate memory cells and devices
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US Patent 7280398 System and memory for sequential multi-plane page memory operations
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US Patent 7280420 Data compression read mode for memory testing
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US Patent 7286387 Reducing the effect of write disturbs in polymer memories
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US Patent 7289347 System and method for optically interconnecting memory devices
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US Patent 7289360 Multi-state memory
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US Patent 7289372 Dual-port memory array using shared write drivers and read sense amplifiers
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US Patent 7295465 Thin film magnetic memory device reducing a charging time of a data line in a data read operation
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US Patent 7295468 Nonvolatile semiconductor memory device
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US Patent 7295474 Operating an information storage cell array
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US Patent 7298645 Nano tube cell, and semiconductor device having nano tube cell and double bit line sensing structure
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US Patent 7298649 Nonvolatile memory card
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US Patent 7298652 Non-volatile memory and semiconductor device
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US Patent 7301792 Apparatus and method of ordering state transition rules for memory efficient, programmable, pattern matching finite state machine hardware
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US Patent 7301796 Memory cells utilizing metal-to-metal capacitors to reduce susceptibility to single event upsets
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US Patent 7301806 Non-volatile semiconductor memory device adapted to store a multi-valued in a single memory cell
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US Patent 7301825 Method of controlling copy-back operation of flash memory device including multi-level cells
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US Patent 7304881 Ferroelectric memory with wide operating voltage and multi-bit storage per cell
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US Patent 7304898 Semiconductor memory device
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US Patent 7307860 Static content addressable memory cell
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US Patent 7307870 Molecular memory devices and methods
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US Patent 7307872 Nonvolatile semiconductor static random access memory device
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US Patent 7307876 High speed low power annular magnetic devices based on current induced spin-momentum transfer
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US Patent 7310258 Memory chip architecture with high speed operation
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US Patent 7310267 NAND flash memory device and method of manufacturing and operating the same
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US Patent 7310275 Non-volatile memory device and method for operation page buffer thereof
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US Patent 7310276 Memory device and method having data path with multiple prefetch I/O configurations
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US Patent 7313020 Multi-level nonvolatile semiconductor memory device and method for reading the same
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US Patent 7317652 Semiconductor device, nonvolatile semiconductor memory, system including a plurality of semiconductor devices or nonvolatile semiconductor memories, electric card including semiconductor device or nonvolatile semiconductor memory, and electric device with which this electric card can be used
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US Patent 7319623 Method for isolating a failure site in a wordline in a memory array
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US Patent 7324385 Molecular memory
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US Patent 7324394 Single data line sensing scheme for TCCT-based memory cells
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US Patent 7327173 Delay-locked loop having a pre-shift phase detector
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US Patent 7327624 Storage device employing a flash memory
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US Patent 7327632 Interface circuit
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US Patent 7330367 Stacked 1T-
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US Patent 7330382 Programmable DQS preamble
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US Patent 7333361 Biosensor and sensing cell array using the same
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US Patent 7336524 Atomic probes and media for high density data storage
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US Patent 7339811 Stacked columnar 1T-nMTJ MRAM structure and its method of formation and operation
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US Patent 7339812 Stacked 1T-
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US Patent 7339815 Method of operating a programmable resistance memory array
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US Patent 7339836 Data collector
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US Patent 7339837 Configurable embedded processor
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US Patent 7345899 Memory having storage locations within a common volume of phase change material
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US Patent 7345922 Position based erase verification levels in a flash memory device
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US Patent 7345934 Multi-state memory
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US Patent 7349234 Magnetic memory array
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US Patent 7349235 Non-volatile memory device
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US Patent 7349252 Integrated DRAM-NVRAM multi-level memory
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US Patent 7349258 Reducing read disturb for non-volatile storage
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US Patent 7349266 Memory device with a data hold latch
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US Patent 7349269 Programmable DQS preamble
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US Patent 7349277 Method and system for reducing the peak current in refreshing dynamic random access memory devices
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US Patent 7352602 Configurable inputs and outputs for memory stacking system and method
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US Patent 7352603 Apparatus and methods for optically-coupled memory systems
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US Patent 7352618 Multi-level cell memory device and associated read method
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US Patent 7352637 Reference current generating circuit of nonvolatile semiconductor memory device
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US Patent 7352641 Dynamic memory throttling for power and thermal limitations
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US Patent 7355883 Magnetoresistance effect element, its manufacturing method, magnetic reproducing element and magnetic memory
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US Patent 7359241 In-service reconfigurable DRAM and flash memory device
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US Patent 7359245 Flash memory device having multi-level cell and reading and programming method thereof
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US Patent 7359273 Semiconductor memory device having layout for minimizing area of sense amplifier region and word line driver region
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US Patent 7362646 Semiconductor memory device
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US Patent 11183048 Apparatus and method for identifying ballistic impact to power transmission assets
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US Patent 11183256 Semiconductor memory device and memory state detecting method
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US Patent 7366006 SRAM with read assist
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US Patent 7366015 Semiconductor integrated circuit device, production and operation method thereof
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US Patent 7366020 Flash memory device capable of preventing an overerase of flash memory cells and erase method thereof
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US Patent 7366032 Multi-ported register cell with randomly accessible history
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US Patent 7366048 Bulk bias voltage level detector in semiconductor memory device
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US Patent 7372714 Methods and memory structures using tunnel-junction device as control element
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US Patent 7372768 Memory with address management
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US Patent 7376000 Memory cells utilizing metal-to-metal capacitors to reduce susceptibility to single event upsets
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US Patent 7376009 Semiconductor memory device which stores plural data in a cell
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US Patent 7376027 DRAM concurrent writing and sensing scheme
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US Patent 7379315 Apparatus and methods for optically-coupled memory systems
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US Patent 7379336 Integrated DRAM-NVRAM multi-level memory
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US Patent 7379373 Voltage supply circuit, in particular for a DRAM memory circuit, as well as a method for controlling a supply source
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US Patent 7379379 Storage device employing a flash memory
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US Patent 7382639 System and method for optically interconnecting memory devices
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US Patent 7382678 Delay stage-interweaved analog DLL/PLL
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US Patent 7385839 Memory devices using carbon nanotube (CNT) technologies
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US Patent 7385842 Magnetic memory having synthetic antiferromagnetic pinned layer
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US Patent 7385843 Multi-state memory
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US Patent 7385868 Method of refreshing a PCRAM memory device
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US Patent 7388788 Reference current generating circuit of nonvolatile semiconductor memory device
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US Patent 7391649 Page buffer and non-volatile memory device including the same
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US Patent 7391666 DRAM power bus control
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US Patent 7394702 Methods for erasing and programming memory devices
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US Patent 7394708 Adjustable global tap voltage to improve memory cell yield
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US Patent 7397711 Distributed write data drivers for burst access memories
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US Patent 7397713 Flash EEprom system
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US Patent 7397716 Nonvolatile semiconductor memory device which stores multivalue data
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US Patent 7400537 Systems for erasing non-volatile memory using individual verification and additional erasing of subsets of memory cells
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US Patent 7403416 Integrated DRAM-NVRAM multi-level memory
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US Patent 7403419 Integrated DRAM-NVRAM multi-level memory
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US Patent 7403428 Systems for erasing non-volatile memory utilizing changing word line conditions to compensate for slower erasing memory cells
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US Patent 7405963 Dynamic data restore in thyristor-based memory device
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US Patent 7405966 Magnetic tunneling junction antifuse device
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US Patent 7405971 Semiconductor device
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US Patent 7405989 Electrical fuses with redundancy
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US Patent 7408830 Dynamic power supplies for semiconductor devices
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US Patent 7411804 Integrated circuit device and electronic instrument
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US Patent 7411805 Semiconductor integrated circuit device
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US Patent 7411807 System and method for optically interconnecting memory devices
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US Patent 7411823 In-service reconfigurable DRAM and flash memory device
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US Patent 7411840 Sense mechanism for microprocessor bus inversion
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US Patent 7414875 Apparatus and methods for a physical layout of simultaneously sub-accessible memory modules
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US Patent 7414892 Nonvolatile semiconductor memory device which stores multivalue data
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US Patent 7414912 Semiconductor flash memory
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US Patent 7414914 Semiconductor memory device
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US Patent 7417888 Method and apparatus for resetable memory and design approach for same
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US Patent 7417893 Integrated DRAM-NVRAM multi-level memory
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US Patent 7420863 Nonvolatile semiconductor memory device which stores multivalue data
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US Patent 7423895 High-speed and low-power differential non-volatile content addressable memory cell and array
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US Patent 7423897 Method of operating a programmable resistance memory array
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US Patent 7425763 Electronic circuit package
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US Patent 7426148 Method and apparatus for identifying short circuits in an integrated circuit device
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US Patent 7428174 Semiconductor flash memory
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US Patent 7433249 Apparatus with equalizing voltage generation circuit and methods of use
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US Patent 7436689 Non-volatile semiconductor memory
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US Patent 7440318 Reducing read disturb for non-volatile storage
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US Patent 7440339 Stacked columnar 1T-
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US Patent 7443723 Multi-state memory
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US Patent 7443742 Memory arrangement and method for processing data
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US Patent 7443749 Switched capacitor DRAM sense amplifier with immunity to mismatch and offsets
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US Patent 7443750 Switched capacitor DRAM sense amplifier with immunity to mismatch and offsets
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US Patent 7447056 Method for using a multi-use memory cell and memory array
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US Patent 7447065 Reducing read disturb for non-volatile storage
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US Patent 7447072 Storage device employing a flash memory
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US Patent 7447075 Charge packet metering for coarse/fine programming of non-volatile memory
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US Patent 7447081 Methods for improved program-verify operations in non-volatile memories
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US Patent 7447106 Delay stage-interweaved analog DLL/PLL
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US Patent RE40567 Flash memory device of capable of sensing a threshold voltage of memory cells on a page mode of operation
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US Patent 7450411 Phase change memory device and manufacturing method
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US Patent 7450462 System and memory for sequential multi-plane page memory operations
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US Patent 7453717 Three-state memory cell
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US Patent 7453729 Bit line setup and discharge circuit for programming non-volatile memory
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US Patent 7453730 Charge packet metering for coarse/fine programming of non-volatile memory
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US Patent 7453751 Sample and hold memory sense amplifier
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US Patent 7453755 Memory cell with high-K antifuse for reverse bias programming
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US Patent 7457159 Integrated DRAM-NVRAM multi-level memory
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US Patent 7457162 Multi-state memory
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US Patent 7457172 Memory device and method having data path with multiple prefetch I/O configurations
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US Patent 7457176 Semiconductor memory and memory module
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US Patent 7460430 Memory devices having reduced coupling noise between wordlines
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US Patent 7468908 Non-volatile semiconductor memory device adapted to store a multi-valued in a single memory cell
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US Patent 7471552 Analog phase change memory
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US Patent 7471578 Internal voltage generation control circuit and internal voltage generation circuit using the same
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US Patent 7474583 Semiconductor memory device
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US Patent 7477549 Reference current generating circuit of nonvolatile semiconductor memory device
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US Patent 7477551 Systems and methods for reading data from a memory array
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US Patent 7480166 Memory cell structure of metal programmable read only memory having bit cells with a shared transistor cell
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US Patent 7480189 Cross-coupled write circuit
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US Patent 7483285 Memory devices using carbon nanotube (CNT) technologies
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US Patent 7483297 Nonvolatile memory card
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US Patent 7483330 Power efficient memory and cards
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US Patent 7486555 Flash memory cell arrays having dual control gates per memory cell charge storage element
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US Patent 7489544 Flash memory device having multi-level cell and reading and programming method thereof
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US Patent 7489568 Delay stage-interweaved analog DLL/PLL
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US Patent 7489581 Semiconductor memory
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US Patent 7489583 Constant-weight-code-based addressing of nanoscale and mixed microscale/nanoscale arrays
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US Patent 7492660 Flash EEprom system
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US Patent 7495956 Reducing read disturb for non-volatile storage
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US Patent 7495991 Memory chip architecture with high speed operation
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US Patent 7499352 Integrated circuit having memory array including row redundancy, and method of programming, controlling and/or operating same
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US Patent 7499354 Method for testing transistors having an active region that is common with other transistors and a testing circuit for accomplishing the same
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US Patent 7502261 Flash memory cell arrays having dual control gates per memory cell charge storage element
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US Patent 7502266 Semiconductor memory device
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US Patent 7505335 Nonvolatile semiconductor memory device
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US Patent 7505336 Method and apparatus for synchronization of row and column access operations
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US Patent 7505350 Voltage reset circuits for a semiconductor memory device using option fuse circuit
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US Patent 7505357 Column/row redundancy architecture using latches programmed from a look up table
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US Patent 7508731 Semiconductor memory device with a fixed burst length having column control unit
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US Patent 7511981 Non-volatile memory device
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US Patent 7512006 Non-volatile memory and semiconductor device
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US Patent 7512009 Method for programming a reference cell
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US Patent 7515453 Integrated memory core and memory interface circuit
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US Patent 7515484 Page buffer circuit of memory device and program method
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US Patent 7515500 Memory device performance enhancement through pre-erase mechanism
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US Patent 11189351 Peak and average current reduction for sub block memory operation
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US Patent 11189356 One-time-programmable memory
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US Patent 7519754 Hard disk drive cache memory and playback device
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US Patent 7522466 DRAM power bus control
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US Patent 7525833 Nanoscale shift register and signal demultiplexing using microscale/nanoscale shift registers
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US Patent 7525838 Flash memory device and method for programming multi-level cells in the same
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US Patent 7525850 Multi-level nonvolatile semiconductor memory device and method for reading the same
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US Patent 7529115 Ferroelectric memory device, electronic apparatus, and ferroelectric memory device driving method
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US Patent 7529140 Semiconductor memory device
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US Patent 7532495 Nonvolatile memory device having flag cells for storing MSB program state
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US Patent 7532531 Flash memory device and multi-block erase method
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US Patent 7535768 Method of controlling copy-back operation of flash memory device including multi-level cells
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US Patent 7539077 Flash memory device having a data buffer and programming method of the same
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US Patent 7542326 Semiconductor memory device
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US Patent 7542340 Integrated circuit including memory array having a segmented bit line architecture and method of controlling and/or operating same
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US Patent 7551507 Power supply circuit and semiconductor memory
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US Patent 7551508 Energy efficient storage device using per-element selectable power supply voltages
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US Patent 7554849 Nonvolatile semiconductor memory
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US Patent 7554858 System and method for reducing pin-count of memory devices, and memory device testers for same
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US Patent 7564726 Semiconductor memory device
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US Patent 7564732 Internal voltage generation circuit for semiconductor device
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US Patent 7567481 Semiconductor memory device adapted to communicate decoding signals in a word line direction
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US Patent 7567482 Block redundancy implementation in heirarchical ram's
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US Patent 7570537 Memory cells with power switch circuit for improved low voltage operation
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US Patent 7570542 Circuit and method for generating data output control signal for semiconductor integrated circuit
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US Patent 7573737 High speed low power magnetic devices based on current induced spin-momentum transfer
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US Patent 7573740 Multi-state memory
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US Patent 7573778 Semiconductor memory device
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US Patent 7577055 Error detection on programmable logic resources
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US Patent 7580283 System and memory for sequential multi-plane page memory operations
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US Patent 7583524 Nonvolatile semiconductor memory device
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US Patent 7583535 Biasing non-volatile storage to compensate for temperature variations
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US Patent 7586807 Semiconductor memory device
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US Patent 7590010 Data output circuit in semiconductor memory device
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US Patent 7590015 Integrated circuit device and electronic instrument
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US Patent 7593260 Semiconductor memory device for storing multivalued data
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US Patent 7596011 Logic process DRAM
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US Patent 7596028 Variable program and program verification methods for a virtual ground memory in easing buried drain contacts
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US Patent 7599241 Enhanced write abort mechanism for non-volatile memory
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US Patent 7602630 Configurable inputs and outputs for memory stacking system and method
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US Patent 7602664 Circuit and method of generating voltage of semiconductor memory apparatus
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US Patent 7602665 Semiconductor integrated circuit device
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US Patent 7606100 Erasing non-volatile memory using individual verification and additional erasing of subsets of memory cells
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US Patent 7606104 Semiconductor memory device and electric power supply method
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US Patent 7609538 Logic process DRAM
‌
US Patent 7609547 Biosensor and sensing cell array using the same
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US Patent 7609569 System and method for implementing row redundancy with reduced access time and reduced device area
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US Patent 7609581 Semiconductor memory device
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US Patent 7613026 Apparatus and methods for optically-coupled memory systems
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US Patent 7613034 Magnetic memory and method for reading-writing information from-to magnetic storage element
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US Patent 7613049 Method and system for a serial peripheral interface
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US Patent 7616483 Multi-bit-per-cell flash memory device with an extended set of commands
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US Patent 7619916 8-T SRAM cell circuit, system and method for low leakage current
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US Patent 7623400 Memory device with programmable control for activation of read amplifiers
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US Patent 7626865 Charge pump operation in a non-volatile memory device
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US Patent 7626881 Semiconductor memory device containing antifuse write voltage generation circuit
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US Patent 7630233 Semiconductor device and driving method of the same
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US Patent 7630260 Semiconductor memory and system
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US Patent 7633805 Circuit and method for generating a reference voltage in memory devices having a non-volatile cell matrix
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US Patent 7633818 Test method for semiconductor memory device and semiconductor memory device therefor
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US Patent 7633822 Circuit and method for controlling sense amplifier of a semiconductor memory apparatus
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US Patent 7639552 Delay locked loop and semiconductor memory device with the same
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US Patent 7643360 Method and apparatus for synchronization of row and column access operations
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US Patent 7643367 Semiconductor memory device
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US Patent 7643368 Power control circuit for semiconductor IC
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US Patent 7646628 Toggle magnetic random access memory and write method of toggle magnetic random access memory
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US Patent 7646643 Process charging monitor for nonvolatile memory
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US Patent 7646651 Latch structure and bit line sense amplifier structure including the same
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US Patent 7646654 Distributed write data drivers for burst access memories
‌
US Patent 7646656 Semiconductor memory device
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US Patent 7646663 Semiconductor memory device and word line addressing method in which neighboring word lines are discontinuously addressed
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US Patent 7649787 Semiconductor device
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US Patent 7652905 Flash memory array architecture
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US Patent 7652911 Nanoscale shift register and signal demultiplexing using microscale/nanoscale shift registers
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US Patent 7652923 Semiconductor device and memory and method of operating thereof
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US Patent 7652945 Adaptive zero current sense apparatus and method for a switching regulator
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US Patent 7660160 Flash memory device and method of operating the same
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US Patent 7660162 Circuit for measuring current in a NAND flash memory
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US Patent 7660172 Method and apparatus for synchronizing data from memory arrays
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US Patent 7660177 Non-volatile memory device having high speed serial interface
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US Patent 7663927 Reading voltage generator for a non-volatile EEPROM memory cell matrix of a semiconductor device and corresponding manufacturing process
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US Patent 7663933 Memory controller
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US Patent 7668020 Data input circuit of semiconductor memory apparatus and data input method using the same
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US Patent 7668021 Semiconductor memory device including output driver
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US Patent 7668023 Page buffer circuit of memory device and program method
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US Patent 7672175 System and method of selectively applying negative voltage to wordlines during memory device read operation
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US Patent 7675776 Bit map control of erase block defect list in a memory
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US Patent 7675787 Two-bits per cell not-and-gate (NAND) nitride trap memory
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US Patent 7675810 Semiconductor memory device
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US Patent 7679951 Charge mapping memory array formed of materials with mutable electrical characteristics
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US Patent 7679967 Controlling AC disturbance while programming
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US Patent 7679972 High reliable and low power static random access memory
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US Patent 7679978 Scheme for screening weak memory cell
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US Patent 7684242 Flash memory device and method of operating the same
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US Patent 7684249 Programming methods for multi-level memory devices
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US Patent 7684269 Semiconductor memory device
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US Patent 7684270 Equalizer circuit and method of controlling the same
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US Patent 7688647 Semiconductor memory device with high voltage generator
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US Patent 7692950 Semiconductor memory device
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US Patent 7693003 Semiconductor package
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US Patent 7697312 SAN/NAS integrated storage system
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US Patent 7697314 Data line layout and line driving method in semiconductor memory device
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US Patent 7697334 Nonvolatile semiconductor memory device and writing method thereof
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US Patent 7697348 Semiconductor memory device
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US Patent 7701743 Electronic circuit package
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US Patent 7701761 Read, verify word line reference voltage to track source level
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US Patent 7701779 Method for programming a reference cell
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US Patent 7701799 Semiconductor device
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US Patent 7706196 Semiconductor memory device
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US Patent 7710771 Method and apparatus for capacitorless double-gate storage
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US Patent 7715221 Apparatus for implementing domino SRAM leakage current reduction
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US Patent 7715231 Flash memory device having multi-level cell and reading and programming method thereof
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US Patent 7715243 Storage device employing a flash memory
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US Patent 7715258 Retention test system and method for resistively switching memory devices
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US Patent 7719869 Memory cell array comprising floating body memory cells
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US Patent 7719878 Reducing the effect of write disturbs in polymer memories
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US Patent 7719905 Semiconductor memory device
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US Patent 7719908 Memory having read disturb test mode
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US Patent 7719909 DRAM writing ahead of sensing scheme
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US Patent 7724601 Electrical fuses with redundancy
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US Patent 7729150 High-speed and low-power differential non-volatile content addressable memory cell and array
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US Patent 7729189 Switched capacitor DRAM sense amplifier with immunity to mismatch and offsets
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US Patent 7733684 Data read/write device
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US Patent 7733712 Storage subsystem with embedded circuit for protecting against anomalies in power signal from host
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US Patent 7733718 One-transistor type DRAM
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US Patent 7733724 Controlling global bit line pre-charge time for high speed eDRAM
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US Patent 7738302 Semiconductor memory device with stores plural data in a cell
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US Patent 7742353 Solid state semiconductor storage device with temperature control function, application system thereof and control element thereof
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US Patent 7742358 Power supply circuit and semiconductor memory
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US Patent 7755924 SRAM employing a read-enabling capacitance
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US Patent 7755941 Nonvolatile semiconductor memory device
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US Patent 7755944 Semiconductor memory device
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US Patent 7755960 Memory including a performance test circuit
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US Patent 7755969 Address receiving circuit for a semiconductor apparatus
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US Patent 7760539 Nonvolatile memory device
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US Patent 7760580 Flash memory device and erase method using the same
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US Patent 7764537 Spin transfer torque magnetoresistive random access memory and design methods
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US Patent 7764547 Regulation of source potential to combat cell source IR drop
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US Patent 7764551 Semiconductor memory system having volatile memory and non-volatile memory that share bus, and method of controlling operation of non-volatile memory
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US Patent 7764567 Word line driver circuitry and methods for using the same
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US Patent 7768846 Individual I/O modulation in memory devices
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US Patent 7773431 Systems and methods for reading data from a memory array
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US Patent 7773442 Memory cell array latchup prevention
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US Patent 7773452 Integrated logic circuit and method for producing an integrated logic circuit
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US Patent 7778094 Semiconductor memory device and latency signal generating method thereof
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US Patent 7782655 Ultra-low power hybrid sub-threshold circuits
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US Patent 7782666 Apparatus and method of multi-bit programming
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US Patent 7782670 Semiconductor memory device for storing multivalued data
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US Patent 7782702 Apparatus and method for memory cell power-up sequence
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US Patent 7786504 Bidirectional PNPN silicon-controlled rectifier
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US Patent 7787282 Sensing resistance variable memory
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US Patent 7791947 Non-volatile memory device and methods of using
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US Patent 7796418 Programmable memory cell
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US Patent 7796442 Nonvolatile semiconductor memory device and method of erasing and programming the same
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US Patent 7796455 Device controlling phase change storage element and method thereof
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US Patent 7796456 Semiconductor device
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US Patent 7813170 Semiconductor memory device capable of memorizing multivalued data
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US Patent 7813174 Semiconductor memory device for storing multivalued data
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US Patent 7813193 Ferroelectric memory brake for screening and repairing bits
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US Patent 7813215 Circuit and method for generating data output control signal for semiconductor integrated circuit
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US Patent 7817484 Method and apparatus for synchronization of row and column access operations
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US Patent 7817488 Load balancing by using clock gears
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US Patent 7821808 Multilayer ferroelectric data storage system with regenerative read
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US Patent 7821849 Configurable embedded processor
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US Patent 7826245 Semiconductor memory
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US Patent 7826247 Method for initializing resistance-variable material, memory device containing a resistance-variable material, and method for initializing nonvolatile memory circuit including variable resistor
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US Patent 7826258 Crossbar diode-switched magnetoresistive random access memory system
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US Patent 7826281 Memory read control circuit
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US Patent 7830736 Semiconductor integrated circuit device and redundancy method thereof
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US Patent 7835191 Bit line setup and discharge circuit for programming non-volatile memory
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US Patent 7835205 Delay stage-interweaved analog DLL/PLL
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US Patent 7839670 F-RAM device with current mirror sense amp
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US Patent 7839690 Adaptive erase and soft programming for memory
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US Patent 7839694 Nonvolatile memory devices and data reading methods
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US Patent 7843731 Memory array architecture for a memory device and method of operating the memory array architecture
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US Patent 7848130 Method and apparatus for improving SRAM write operations
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US Patent 7848157 Page buffer circuit of memory device and program method
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US Patent 7848171 Semiconductor memory device compensating leakage current
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US Patent 7852684 Page buffer circuit of memory device and program method
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US Patent 7855917 Semiconductor memory device and driving method thereof
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US Patent 7855919 Non-volatile memory and semiconductor device
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US Patent 7859885 Phase changing memory device
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US Patent 7859896 Semiconductor device
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US Patent 7864600 Memory cell employing reduced voltage
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US Patent 7869241 Memory core and semiconductor memory device having the same
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US Patent 7869300 Memory device control for self-refresh mode
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US Patent 7872909 Memory device and memory data read method
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US Patent 7872935 Memory cells with power switch circuit for improved low voltage operation
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US Patent 7876591 Semiconductor memory device and method of forming a layout of the same
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US Patent 7881133 Method of managing a flash memory and the flash memory
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US Patent 7885092 Semiconductor storage device and operation method thereof
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US Patent 7885121 Resistance change memory device
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US Patent 7889573 Time reduction of address setup/hold time for semiconductor memory
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US Patent 7889574 Semiconductor memory device employing clamp for preventing latch up
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US Patent 7889588 Circuit having gate oxide protection for low voltage fuse reads and high voltage fuse programming
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US Patent 7894235 F-RAM device with current mirror sense amp
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US Patent 7894253 Carbon filament memory and fabrication method
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US Patent 7894284 Ferroelectric memory bake for screening and repairing bits
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US Patent 7898857 Memory structure having volatile and non-volatile memory portions
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US Patent 7898868 Multi-state memory
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US Patent 7898881 Semiconductor memory device and data sensing method thereof
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US Patent RE42202 Circuit for controlling an enabling time of an internal control signal according to an operating frequency of a memory device and the method thereof
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US Patent 7903482 Semiconductor storage device and memory cell test method
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US Patent 7907453 Nonvolatile semiconductor memory device
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US Patent 7907460 Error detection on programmable logic resources
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US Patent 7911819 Apparatus and methods for a physical layout of simultaneously sub-accessible memory modules
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US Patent 7911872 Column/row redundancy architecture using latches programmed from a look up table
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US Patent 7916561 DLL circuit, imaging device, and memory device
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US Patent 7920419 Isolated P-well architecture for a memory device
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US Patent 7920424 Scalable electrically eraseable and programmable memory (EEPROM) cell array
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US Patent 7924587 Programming of analog memory cells using a single programming pulse per state transition
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US Patent 7924632 Semiconductor memory device
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US Patent 7924633 Implementing boosted wordline voltage in memories
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US Patent 7929332 Semiconductor memory device and semiconductor device
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US Patent 7929372 Decoder, memory system, and physical position converting method thereof
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US Patent 7933138 F-RAM device with current mirror sense amp
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US Patent 7936587 Data read/write device
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US Patent 7936617 Nonvolatile semiconductor memory device
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US Patent 7936621 Semiconductor integrated circuit device
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US Patent 7936633 Circuit and method of generating voltage of semiconductor memory apparatus
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US Patent 7940541 Bit cell designs for ternary content addressable memory
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US Patent 7940544 Memory system having multiple vias at junctions between traces
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US Patent 7940545 Low power read scheme for read only memory (ROM)
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US Patent 7940558 Integrated circuit comprising a thyristor and method of controlling a memory cell comprising a thyristor
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US Patent 7940579 Semiconductor integrated circuit device
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US Patent 7940580 Voltage shifting word-line driver and method therefor
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US Patent 7940590 Electronic device comprising non volatile memory cells and corresponding programming method
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US Patent 7940596 Adaptive zero current sense apparatus and method for a switching regulator
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US Patent 7944724 Ternary content addressable memory having reduced leakage effects
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US Patent 7944762 Non-volatile memory control
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US Patent 7944769 System for power-on detection
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US Patent 7952940 Semiconductor memory device
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US Patent 7952948 Semiconductor memory apparatus
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US Patent 7957174 Semiconductor memory
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US Patent 7957211 Method and apparatus for synchronization of row and column access operations
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US Patent 7961500 Semiconductor device
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US Patent 7961540 Dynamic data restore in thyristor-based memory device
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US Patent 7961541 Memory device with self-refresh operations
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US Patent 7969759 Method and apparatus for improving SRAM write operations
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US Patent 7969779 Integrated circuit including memory array having a segmented bit line architecture and method of controlling and/or operating same
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US Patent 7969794 One-transistor type DRAM
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US Patent 7969798 Phase change memory devices and read methods using elapsed time-based read voltages
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US Patent 7974138 Semiconductor memory device
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US Patent 7978491 Stacked memory cell structure and method of forming such a structure
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US Patent 7978492 Integrated circuit incorporating decoders disposed beneath memory arrays
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US Patent 7978514 Semiconductor memory device for storing multivalued data
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US Patent 7978543 Semiconductor device testable on quality of multiple memory cells in parallel and testing method of the same
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US Patent 7983102 Data detecting apparatus and methods thereof
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US Patent 7983106 Voltage stabilization circuit and semiconductor memory apparatus using the same
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US Patent 7986562 Controlling AC disturbance while programming
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US Patent 7986580 Self-refresh based power saving circuit and method
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US Patent 7990746 Method and circuit for configuring memory core integrated circuit dies with memory interface integrated circuit dies
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US Patent 7990790 Write driver circuit of PRAM
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US Patent 7990795 Dynamic random access memory (DRAM) refresh
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US Patent 7995418 Method and computer program for controlling a storage device having per-element selectable power supply voltages
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US Patent 8000129 Field-emitter-based memory array with phase-change storage devices
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US Patent 8000131 Non-volatile field programmable gate array
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US Patent 8000152 Charge pump operation in a non-volatile memory device
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US Patent 8004873 Resistance change memory device
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US Patent 8004912 Block redundancy implementation in hierarchical rams
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US Patent 8009505 Semiconductor memory device
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US Patent 8009505 Semiconductor memory device
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US Patent 8004912 Block redundancy implementation in hierarchical rams
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US Patent 8000131 Non-volatile field programmable gate array
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US Patent 8000129 Field-emitter-based memory array with phase-change storage devices
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US Patent 7983106 Voltage stabilization circuit and semiconductor memory apparatus using the same
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US Patent 7983102 Data detecting apparatus and methods thereof
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