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Richard Elms

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Maple Leaf Angels
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Patent primary examiner of
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US Patent 7087513 Method to produce low strength temporary solder joints
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US Patent 7088609 Spin barrier enhanced magnetoresistance effect element and magnetic memory using the same
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US Patent 7088626 Bias voltage applying circuit and semiconductor memory device
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US Patent 7092272 Mechanical memory
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US Patent 7092275 Memory device of ferro-electric
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US Patent 7092282 Semiconductor integrated circuit device
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US Patent 7092288 Non-volatile memory array with simultaneous write and erase feature
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US Patent 7092289 Efficient redundancy system for flash memories with uniformly sized blocks
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US Patent 7092291 Nonvolatile semiconductor memory device, charge injection method thereof and electronic apparatus
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US Patent 7092293 Non-volatile memory cell integrated with a latch
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US Patent 7092312 Pre-emphasis for strobe signals in memory device
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US Patent 7094625 Field effect transistor and method of producing the same
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US Patent 7095658 Flash memory data bus for synchronous burst read page
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US Patent 7095659 Variable voltage supply bias and methods for negative differential resistance (NDR) based memory device
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US Patent 7095666 Wide databus architecture
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US Patent 7099182 Static random access memory and pseudo-static noise margin measuring method
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US Patent 7099194 Error recovery for nonvolatile memory
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US Patent 7099197 Semiconductor memory device
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US Patent 7099201 Multifunctional latch circuit for use with both SRAM array and self test device
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US Patent 7099214 Semiconductor memory device
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US Patent 7099218 Differential current evaluation circuit and sense amplifier circuit for evaluating a memory state of an SRAM semiconductor memory cell
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US Patent 7102914 Gate controlled floating well vertical MOSFET
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US Patent 7102925 Flash memory device
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US Patent 7102941 Semiconductor memory device and portable electronic apparatus
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US Patent 7102944 Programmable analog control of a bitline evaluation circuit
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US Patent 7102949 Semiconductor memory device and memory system
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US Patent 7106608 Priority circuit
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US Patent 7106619 Graphics controller integrated circuit without memory interface
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US Patent 7106632 Integrated circuit with analog or multilevel storage cells and user-selectable sampling frequency
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US Patent 7106643 Method for manufacturing memory device provided with a defect recovery mechanism featuring a redundancy circuit
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US Patent 7106644 Memory device and method for burn-in test
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US Patent 7106653 Semiconductor memory device and data read method of the same
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US Patent 7110284 Magnetic nonvolatile memory cell and magnetic random access memory using the same
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US Patent 7110287 Method and system for providing heat assisted switching of a magnetic element utilizing spin transfer
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US Patent 7110292 Programming circuits and methods for multimode non-volatile memory devices
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US Patent 7110293 Non-volatile memory element with oxide stack and non-volatile SRAM using the same
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US Patent 7110297 Semiconductor storage device and mobile electronic apparatus
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US Patent 7110301 Non-volatile semiconductor memory device and multi-block erase method thereof
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US Patent 7110308 Self-latched control circuit for memory program operation
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US Patent 7110311 Sense amplifier for reduced sense delay in low power mode
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US Patent 7110316 Shared decoupling capacitance
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US Patent 7113424 Energy adjusted write pulses in phase-change memories
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US Patent 7113436 Sense amplifying circuit for a semiconductor memory with improved data read ability at a low supply voltage
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US Patent 7113437 Sense amplifier systems and a matrix-addressable memory device provided therewith
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US Patent 7113441 Semiconductor memory
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US Patent 7116572 Circuit for generating a centered reference voltage for a 1T/1C ferroelectric memory
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US Patent 7116579 Semiconductor storage device and mobile electronic apparatus
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US Patent 7116592 Semiconductor device and test method thereof
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US Patent 7116597 High precision reference devices and methods
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US Patent 7116598 Semiconductor memory
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US Patent 7116601 Pseudo-synchronization of the transportation of data across asynchronous clock domains
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US Patent 7120049 Magnetic cell and magnetic memory
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US Patent 7120059 Memory array including multiple-gate charge trapping non-volatile cells
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US Patent 7120071 Test method for a semiconductor memory
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US Patent 7120075 Multi-FIFO integrated circuit devices that support multi-queue operating modes with enhanced write path and read path queue switching
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US Patent 7123496 L0 cache alignment circuit
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US Patent 7123497 Memory module and memory system
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US Patent 7123515 Semiconductor integrated circuit adapted to output pass/fail results of internal operations
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US Patent 7123540 Semiconductor device having delay-locked loop and test method thereof
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US Patent 7126846 Method and driver for programming phase change memory cell
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US Patent 7126847 Method and driver for programming phase change memory cell
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US Patent 7126848 Magnetic cell and magnetic memory
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US Patent 7126849 Magnetic cell and magnetic memory
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US Patent 7126854 Technique for programming floating-gate transistor used in circuitry as flash EPROM
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US Patent 7126857 Storage subsystem with embedded circuit for protecting against anomalies in power signal from host
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US Patent 7130212 Field effect device with a channel with a switchable conductivity
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US Patent 7130215 Method and apparatus for operating a non-volatile memory device
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US Patent 7130230 Systems for built-in-self-test for content addressable memories and methods of operating the same
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US Patent 7130235 Method and apparatus for a sense amplifier
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US Patent 7130240 Semiconductor memory system and method for multi-sector erase operation
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US Patent 7133302 Low power content addressable memory
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US Patent 7133303 Dynamic type semiconductor memory apparatus
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US Patent 7133313 Operation scheme with charge balancing for charge trapping non-volatile memory
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US Patent 7133320 Flood mode implementation for continuous bitline local evaluation circuit
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US Patent 7133321 Sense amplifier circuit
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US Patent 7133324 Synchronous dynamic random access memory devices having dual data rate 1 (DDR1) and DDR2 modes of operation and methods of operating same
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US Patent 11177274 Vertical non-volatile memory device, method of fabricating the same device, and electric-electronic system having the same device
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US Patent 7136299 High-density phase change cell array and phase change memory device having the same
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US Patent 7136304 Method, system and circuit for programming a non-volatile memory array
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US Patent 7136308 Efficient method of data transfer between register files and memories
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US Patent 7136314 Memory device and test method thereof
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US Patent 7136315 Bank selectable parallel test circuit and parallel test method thereof
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US Patent 7136320 Method and regulating circuit for refreshing dynamic memory cells
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US Patent 7136322 Programmable semi-fusible link read only memory and method of margin testing same
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US Patent 7139184 Memory cell array
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US Patent 7139186 Failure detection circuit
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US Patent 7139190 Single event upset tolerant memory cell layout
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US Patent 7139193 Non-volatile memory with two adjacent memory cells sharing same word line
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US Patent 7139197 Voltage regulation system for a multiword programming of a low integration area non volatile memory
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US Patent 7139200 Method of identifying logical information in a programming and erasing cell by on-side reading scheme
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US Patent 7139210 Synchronous semiconductor memory device for reducing power consumption
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US Patent 7139211 Semiconductor memory device for reducing cell area
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US Patent 7139214 Semiconductor integrated circuit
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US Patent 7139215 Apparatus and method of word line decoding for deep pipelined memory
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US Patent 7142444 Data reading method, data writing method, and semiconductor memory device
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US Patent 7142463 Register file method incorporating read-after-write blocking using detection cells
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US Patent 7142477 Memory interface system and method for reducing cycle time of sequential read and write accesses using separate address and data buses
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US Patent 7145794 Programmable microelectronic devices and methods of forming and programming same
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US Patent 7145795 Multi-cell resistive memory array architecture with select transistor
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US Patent 7145796 Semiconductor integrated circuit device
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US Patent 7145797 Selecting a magnetic memory cell write current
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US Patent 7145805 Nonvolatile memory system, semiconductor memory, and writing method
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US Patent 7145823 Method and apparatus to implement a temperature control mechanism on a memory device
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US Patent 7145827 Refresh control circuit and method for multi-bank structure DRAM
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US Patent 7145828 Semiconductor memory device with auto refresh to specified bank
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US Patent 7149101 Method and apparatus for smoothing current transients in a content addressable memory (CAM) device with dummy searches
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US Patent 7149116 Nonvolatile semiconductor memory and programming method for the same
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US Patent 7149127 Flash memory card
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US Patent 7149137 Process monitoring for ferroelectric memory devices with in-line retention test
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US Patent 7149139 Circuitry and methods for efficient FIFO memory
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US Patent 7149141 Memory device and method having low-power, high write latency mode and high-power, low write latency mode and/or independently selectable write latency
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US Patent 7151683 High speed memory modules utilizing on-trace capacitors
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US Patent 7151687 Ferroelectric memory device, electronic apparatus and driving method
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US Patent 7151689 Adjusting the frequency of an oscillator for use in a resistive sense amp
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US Patent 7151697 Non-volatile semiconductor memory
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US Patent 7151706 CMIS semiconductor nonvolatile storage circuit
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US Patent 7151710 Semiconductor memory device with data input/output organization in multiples of nine bits
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US Patent 7154767 Method for manufacture of semiconductor device
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US Patent 7154773 MRAM cell with domain wall switching and field select
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US Patent 7154784 Flash memory with reduced size and method for accessing the same
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US Patent 7158397 Line drivers that fits within a specified line pitch
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US Patent 7158408 Current source control in RFID memory
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US Patent 7158420 Inversion bit line, charge trapping non-volatile memory and method of operating same
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US Patent 7158426 Method for testing an integrated semiconductor memory
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US Patent 7158428 Semiconductor memory device having hierarchical bit line structure
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US Patent 7158433 Semiconductor storage device and method of controlling refreshing of semiconductor storage device
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US Patent 7158442 Flexible latency in flash memory
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US Patent 7161823 Semiconductor memory device and method of arranging signal and power lines thereof
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US Patent 7161824 Method for programming a memory arrangement and programmed memory arrangement
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US Patent 7161832 Non-volatile semiconductor memory device
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US Patent 7161845 Static random access memory device having a memory cell with multiple bit-elements
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US Patent 7161859 Semiconductor integrated circuit
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US Patent 7164168 Non-planar flash memory having shielding between floating gates
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US Patent 7164608 NVRAM memory cell architecture that integrates conventional SRAM and flash cells
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US Patent 7164615 Semiconductor memory device performing auto refresh in the self refresh mode
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US Patent 7164616 Memory array leakage reduction circuit and method
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US Patent 7167407 Dynamic semiconductor memory device and power saving mode of operation method of the same
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US Patent 7167409 Semiconductor memory device
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US Patent 7169637 One mask Pt/PCMO/Pt stack etching process for RRAM applications
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US Patent 7170802 Flexible and area efficient column redundancy for non-volatile memories
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US Patent 7170806 Data path having grounded precharge operation and test compression capability
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US Patent 7173844 Device and method for generating reference voltage in Ferroelectric Random Access Memory (FRAM)
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US Patent 7173852 Corrected data storage and handling methods
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US Patent 7173855 Current limiting antifuse programming path
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US Patent 7177174 Ferroelectric memory device having a reference voltage generating circuit
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US Patent 7177177 Back-gate controlled read SRAM cell
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US Patent 7177193 Programmable fuse and antifuse and method therefor
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US Patent 7177207 Sense amplifier timing
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US Patent 7177214 Methods and systems for dynamically selecting word line off times and/or bit line equalization start times in memory devices
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US Patent 7177218 DRAM device with a refresh period that varies responsive to a temperature signal having a hysteresis characteristic
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US Patent 7177221 Initializing memory blocks
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US Patent 7177223 Memory device and method having banks of different sizes
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US Patent 7177226 Word line driving circuit of semiconductor memory device
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US Patent 7180783 Non-volatile memory devices that include a programming verification function
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US Patent 7180797 Reduced power registered memory module and method
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US Patent 7180813 Programmable system device having a shared power supply voltage generator for FLASH and PLD modules
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US Patent 7180818 High performance register file with bootstrapped storage supply and method of reading data therefrom
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US Patent 7184301 Magnetic memory cell and magnetic random access memory using the same
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US Patent 7184352 Memory system and method using ECC to achieve low power refresh
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US Patent 7187600 Method and apparatus for protecting an integrated circuit from erroneous operation
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US Patent 7193889 Switching of MRAM devices having soft magnetic reference layers
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US Patent 7196944 Voltage detection circuit control device, memory control device with the same, and memory card with the same
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US Patent 7200031 Proton and heavy ion SEU resistant SRAM
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US Patent 7200042 Method and circuit arrangement for reading from a flash/EEPROM memory cell
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US Patent 7224593 Detecting “almost match” in a CAM
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US Patent 7224600 Tamper memory cell
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US Patent 7242603 Method of operating a complementary bit resistance memory sensor
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US Patent 7245547 Power detector for use in a nonvolatile memory device and method thereof
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US Patent 7321516 Biasing structure for accessing semiconductor memory cell storage elements
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US Patent 11183249 Nonvolatile memory device with intermediate switching transistors and programming method
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US Patent 7420830 Memory card module
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US Patent 7423925 Memory
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US Patent 7433229 Flash memory device with shunt
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US Patent 7433254 Accelerated single-ended sensing for a memory circuit
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US Patent 7433257 Semiconductor memory device
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US Patent 7436706 Method and apparatus for varying the programming duration and/or voltage of an electrically floating body transistor, and memory cell array implementing same
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US Patent 7443003 Shape memory alloy information storage device
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US Patent 7443716 Spatial light modulator with four transistor electrode driver
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US Patent 7443721 Semiconductor integrated device
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US Patent 7443732 High performance flash memory device capable of high density data storage
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US Patent 7443739 Integrated semiconductor memory devices with generation of voltages
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US Patent 7447059 Semiconductor integrated circuit
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US Patent 7447077 Referencing scheme for trap memory
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US Patent 7447083 Semiconductor memory device having low power consumption type column decoder and read operation method thereof
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US Patent 7447086 Selective program voltage ramp rates in non-volatile memory
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US Patent 7447096 Method for refreshing a non-volatile memory
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US Patent 7447099 Leakage mitigation logic
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US Patent 7450442 Semiconductor memory device with increased domain crossing margin
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US Patent 7450447 Memory device and method having low-power, high write latency mode and high-power, low write latency mode and/or independently selectable write latency
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US Patent 7450448 Semiconductor memory device
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US Patent 7450458 Dynamic random access memories and method for testing performance of the same
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US Patent 7450460 Voltage control circuit and semiconductor device
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US Patent 7453720 Magnetic random access memory with stacked toggle memory cells having oppositely-directed easy-axis biasing
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US Patent 7453726 Non-volatile memory cell with improved programming technique and density
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US Patent 7453731 Method for non-volatile memory with linear estimation of initial programming voltage
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US Patent 7453737 Program method with optimized voltage level for flash memory
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US Patent 7453739 Semiconductor integrated circuit adapted to output pass/fail results of internal operations
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US Patent 7453746 Reconstruction of signal timing in integrated circuits
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US Patent 7453750 Flash memory device with word line discharge unit and data read method thereof
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US Patent 7456482 Carbon nanotube-based electronic switch
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US Patent 7457160 Methods of applying read voltages in NAND flash memory arrays
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US Patent 7459747 Nonvolatile semiconductor memory device and manufacturing method of the same
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US Patent 7460396 Semiconductor device
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US Patent 7460402 Semiconductor memory device which generates voltages corresponding to a plurality of threshold voltages
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US Patent 7460403 Flash memory devices and methods of operating the same
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US Patent 7460419 Nonvolatile semiconductor storing device and block redundancy saving method
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US Patent 7460422 Determining history state of data based on state of partially depleted silicon-on-insulator
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US Patent 7462544 Methods for fabricating transistors having trench gates
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US Patent 7463506 Memory device, memory circuit and semiconductor integrated circuit having variable resistance
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US Patent 7463534 Write apparatus for DDR SDRAM semiconductor memory device
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US Patent 7463545 System and method for reducing latency in a memory array decoder circuit
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US Patent 7465952 Programmable non-volatile resistance switching device
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US Patent 7466619 Semiconductor memory device
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US Patent 7468904 Apparatus for hardening a static random access memory cell from single event upsets
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US Patent 7470930 Silicon carbide semiconductor device
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US Patent 7474572 Delay locked loop circuit for a synchronous semiconductor memory device and a method of generating information about a load connected to a data pin of a synchronous semiconductor memory device
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US Patent 7476928 Flash memory devices and methods of fabricating the same
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US Patent 7483292 Memory cell with separate read and program paths
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US Patent 7483293 Method for improving the thermal characteristics of semiconductor memory cells
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US Patent 7483300 Non-volatile memory device
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US Patent 7483310 System and method for providing high endurance low cost CMOS compatible EEPROM devices
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US Patent 7483318 Storage management process, storage management apparatus, and computer-readable medium storing storage management program
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US Patent 7483333 Memory device and method having banks of different sizes
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US Patent 7485488 Biomimetic approach to low-cost fabrication of complex nanostructures of metal oxides by natural oxidation at low-temperature
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US Patent 7486559 Non-volatile semiconductor memory device
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US Patent 7486570 Flash memory device having reduced program time and related programming method
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US Patent 7486580 Wide databus architecture
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US Patent 7489010 Semiconductor memory device
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US Patent 7489572 Method for implementing eFuse sense amplifier testing without blowing the eFuse
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US Patent 7492028 Photoelectric conversion device and manufacturing method of the same, and a semiconductor device
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US Patent 7492628 Computer-readable medium encoding a memory using a back-gate controlled asymmetrical memory cell
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US Patent 7492635 NOR-type hybrid multi-bit non-volatile memory device and method of operating the same
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US Patent 7492638 Gated diode nonvolatile memory operation
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US Patent 7495303 Magnetic elements with spin engineered insertion layers and MRAM devices using the magnetic elements
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US Patent 7495949 Asymmetrical random access memory cell, memory comprising asymmetrical memory cells and method to operate such a memory
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US Patent 7495953 System for configuring compensation
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US Patent 7495967 Method of identifying logical information in a programming and erasing cell by on-side reading scheme
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US Patent 7495979 Method and system for in-situ parametric SRAM diagnosis
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US Patent 7499313 Nonvolatile memory with data clearing functionality
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US Patent 7499349 Memory with resistance memory cell and evaluation circuit
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US Patent 7499364 Multi-port semiconductor memory device and signal input/output method therefor
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US Patent 7499368 Variable clocking read capture for double data rate memory devices
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US Patent 7502249 Method and system for using a pulsed field to assist spin transfer induced switching of magnetic memory elements
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US Patent 7505345 Circuit and method for an SRAM with two phase word line pulse
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US Patent 7505349 Refresh sequence control for multiple memory elements
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US Patent 7505358 Synchronous semiconductor memory device
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US Patent 7508700 Method of magnetic tunneling junction pattern layout for magnetic random access memory
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US Patent 7522439 Low power content addressable memory system and method
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US Patent 7522444 Memory circuit, method for operating a memory circuit, memory device and method for producing a memory device
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US Patent 7531892 Superconducting boron nanostructures
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US Patent 7532507 Phase change memory device and method for manufacturing phase change memory device
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US Patent 7539046 Integrated circuit with magnetic memory
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US Patent 7539049 Magnetic random access memory and operation method
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US Patent 7539051 Memory storage devices comprising different ferromagnetic material layers, and methods of making and using the same
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US Patent 7539075 Implementation of a fusing scheme to allow internal voltage trimming
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US Patent 7539078 Circuits to delay a signal from a memory device
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US Patent 7545672 Spin injection write type magnetic memory device
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US Patent 7545690 Method for evaluating memory cell performance
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US Patent 7551466 Bit line coupling
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US Patent 7554832 Passive element memory array incorporating reversible polarity word line and bit line decoders
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US Patent 7558099 Method of controlling the resistance in a variable resistive element and non-volatile semiconductor memory device
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US Patent 7570512 Phase change memory device with reduced unit cell size and improved transistor current flow and method for manufacturing the same
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US Patent 7570530 Nonvolatile memory device using variable resistive element
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US Patent 7577021 Spin transfer MRAM device with separated CPP assisted writing
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US Patent 7583529 Magnetic tunnel junction devices and magnetic random access memory
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US Patent 7586772 Method and apparatus for aborting content addressable memory search operations
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US Patent 7590026 Access to printing material container
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US Patent 7596017 Magnetic random access memory and method of reducing critical current of the same
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US Patent 7598542 SRAM devices and methods of fabricating the same
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US Patent 7599217 Memory cell device and manufacturing method
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US Patent 7599233 RFID device having nonvolatile ferroelectric memory device
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US Patent 7613028 Solid electrolyte switching element
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US Patent 7613053 Memory device and method of operating such a memory device
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US Patent 7616468 Method and apparatus for reducing power consumption in a content addressable memory
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US Patent 7633796 Storage element and memory
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US Patent 7633803 Methods of operating memory devices including negative incremental step pulse programming and related devices
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US Patent 7646623 Ferroelectric memory device and electronic apparatus
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US Patent 7646634 Magnetic memory device and method of magnetization reversal of the magnetization of at least one magnetic memory element
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US Patent 7652913 Magnetoresistance effect element and magnetic memory
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US Patent 7652914 Memory including two access devices per phase change element
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US Patent 7663900 Tree-structure memory device
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US Patent 7672156 Phase change random access memory device
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US Patent 7675795 Semiconductor device, wireless chip, IC card, IC tag, transponder, bill, securities, passport, electronic apparatus, bag, and garment
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US Patent 7675796 Semiconductor device
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US Patent 7679950 Integrated circuit having a switch
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US Patent 7679954 Phase change memory apparatus having an improved cycling endurance and programming method therefor
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US Patent 7679979 High speed SRAM
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US Patent 7679980 Resistive memory including selective refresh operation
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US Patent 7692957 Phase change memory device with ensured sensing margin and method of manufacturing the same
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US Patent 7701756 Magnetic memory composition and method of manufacture
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US Patent 7701760 Resistance variable memory device with sputtered metal-chalcogenide region and method of fabrication
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US Patent 7710756 Semiconductor device using magnetic domain wall moving
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US Patent 7710757 Magnetic track using magnetic domain wall movement and information storage device including the same
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US Patent 7710798 State storage with defined retention time
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US Patent 7715270 Address synchronous circuit capable of reducing current consumption in DRAM
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US Patent 7719885 Thin film magnetic memory device having a highly integrated memory array
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US Patent 7719886 Multi-level resistive memory cell using different crystallization speeds
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US Patent 7719922 Address counter, semiconductor memory device having the same, and data processing system
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US Patent 7724561 Ferroelectric memory device, its driving method and electronic apparatus
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US Patent 7724567 Memory device and method of refreshing
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US Patent 7729160 Phase-change random access memory
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US Patent 7729161 Phase change memory with dual word lines and source lines and method of operating same
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US Patent 7729162 Semiconductor phase change memory using multiple phase change layers
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US Patent 7733709 Semiconductor memory device with internal voltage generating circuit and method for operating the same
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US Patent 7733730 Negative voltage detection circuit and semiconductor integrated circuit
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US Patent 7738280 Resistive nonvolatile memory element, and production method of the same
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US Patent 7738286 Magnetic memory device
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US Patent 7742322 Electronic and optoelectronic devices with quantum dot films
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US Patent 7742328 Method and system for providing spin transfer tunneling magnetic memories utilizing non-planar transistors
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US Patent 7742330 Semiconductor device
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US Patent 7742333 Magnetic memory device using domain structure and multi-state of ferromagnetic material
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US Patent 7742348 Concatenated pointers for radio frequency identification tags
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US Patent 7746681 Methods of making quantum dot films
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US Patent 7751224 Data writing and reading method for memory device employing magnetic domain wall movement
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US Patent 7751248 Indirect measurement of negative margin voltages in endurance testing of EEPROM cells
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US Patent 7755930 Semiconductor memory device and magneto-logic circuit
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US Patent 7755933 Spin transfer MRAM device with separated CCP assisted writing
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US Patent 7755968 Integrated circuit memory device having dynamic memory bank count and page size
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US Patent 7760535 Sequence of current pulses for depinning magnetic domain walls
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US Patent 7760544 Spin transfer MRAM device with separated CPP assisted writing
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US Patent 7760557 Buffer control circuit of memory device
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US Patent 7764538 Magnetic memory and method for writing to magnetic memory
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US Patent 7764539 Spin transfer MRAM device with separated CPP assisted writing
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US Patent 7768809 Wall nucleation propagation for racetrack memory
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US Patent 7768835 Non-volatile memory erase verify
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US Patent 7773404 Quantum dot optical devices with enhanced gain and sensitivity and methods of making same
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US Patent 7778090 Buffer circuit for a memory module
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US Patent 7782663 Data storage device using magnetic domain wall movement and method of operating the data storage device
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US Patent 7782691 Apparatus for guaranteed write through in domino read SRAM's
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US Patent 7787280 Electric element, memory device, and semiconductor integrated circuit
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US Patent 7787289 MRAM design with local write conductors of reduced cross-sectional area
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US Patent 7787303 Programmable CSONOS logic element
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US Patent 7787317 Memory circuit and tracking circuit thereof
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US Patent 7791929 Magnetoresistive RAM and associated methods
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US Patent 7791932 Phase-change material layer and phase-change memory device including the phase-change material layer
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US Patent 7791933 Optimized phase change write method
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US Patent 7796415 Magnetic layer, method of forming the magnetic layer, information storage device including the magnetic layer, and method of manufacturing the information storage device
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US Patent 7796464 Synchronous memory with a shadow-cycle counter
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US Patent 7800935 Resistance change memory device
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US Patent 7800945 Method for index programming and reduced verify in nonvolatile memory
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US Patent 7804706 Bottom electrode mask design for ultra-thin interlayer dielectric approach in MRAM device fabrication
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US Patent 7804712 Flash memory device and program recovery method thereof
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US Patent 7808815 Variable resistance memory device and method of manufacturing the same
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US Patent 7808816 Semiconductor memory device and method for fabricating semiconductor memory device
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US Patent 7813154 Method and apparatus for address allotting and verification in a semiconductor device
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US Patent 7813172 Nonvolatile memory with correlated multiple pass programming
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US Patent 7817464 Phase change memory cell employing a GeBiTe layer as a phase change material layer, phase change memory device including the same, electronic system including the same and method of fabricating the same
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US Patent 7817465 Phase change random access memory
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US Patent 7817489 Power supplying circuit and phase-change random access memory including the same
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US Patent 7817491 Bank control device and semiconductor device including the same
‌
US Patent 7826241 Semiconductor memory device that can relieve defective address
‌
US Patent 7826272 Semiconductor memory device
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US Patent 7826283 Memory device and method having low-power, high write latency mode and high-power, low write latency mode and/or independently selectable write latency
‌
US Patent 7826296 Fuse monitoring circuit for semiconductor memory device
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US Patent 7826305 Latency counter, semiconductor memory device including the same, and data processing system
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US Patent 7830741 Semiconductor memory device for controlling banks
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US Patent 7858978 Nonvolatile organic bistable memory device and method of manufacturing the same
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US Patent 7859881 Magnetic memory device and write/read method of the same
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US Patent 7859882 Resistive memory device and method of writing data
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US Patent 7859886 Resistance memory element and method of manufacturing the same, and semiconductor memory device
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US Patent 7859893 Phase change memory structure with multiple resistance states and methods of programming and sensing same
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US Patent 7859930 Embedded memory databus architecture
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US Patent 7864556 Magnetic domain information storage device and method of manufacturing the same
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US Patent 7869238 N-way mode content addressable memory array
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US Patent 7869255 Non-volatile memory devices, method of manufacturing and method of operating the same
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US Patent 7869264 Information storage devices using magnetic domain wall movement and methods of operating the same
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US Patent 7869265 Magnetic random access memory and write method of the same
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US Patent 7869268 Phase change memory erasable and programmable by a row decoder
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US Patent 7872899 Semiconductor memory device
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US Patent 7872908 Phase change memory devices and fabrication methods thereof
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US Patent 7872938 Soft error robust static random access memory cell storage configuration.
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US Patent 7881091 Methods of making quantum dot films
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US Patent 7881092 Increased switching cycle resistive memory element
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US Patent 7881097 Storage element and memory
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US Patent 7881103 Phase-change memory device and method of fabricating the same
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US Patent 7881118 Sense transistor protection for memory programming
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US Patent 7881143 Interface circuit
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US Patent 7885094 MRAM with cross-tie magnetization configuration
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US Patent 7885099 Adaptive wordline programming bias of a phase change memory
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US Patent 7885105 Magnetic tunnel junction cell including multiple vertical magnetic domains
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US Patent 7885119 Compensating for coupling during programming
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US Patent 7885125 Semiconductor memory device having integrated driving word line intermediate voltages by pull-up circuits
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US Patent 7885136 Semiconductor memory device having high stability and quality of readout operation
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US Patent 7889548 Method for reducing a reset current for resetting a portion of a phase change material in a memory cell of a phase change memory device and the phase change memory device
‌
US Patent 7889561 Read operation for NAND memory
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US Patent 7889578 Single-strobe operation of memory devices
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US Patent 7889583 Memory circuit and tracking circuit thereof
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US Patent 7894269 Nonvolatile memory and method for compensating during programming for perturbing charges of neighboring cells
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US Patent 7898849 Compound cell spin-torque magnetic random access memory
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US Patent 7898852 Trapped-charge non-volatile memory with uniform multilevel programming
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US Patent 7907455 High VT state used as erase condition in trap based nor flash cell design
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US Patent 7907473 Semiconductor memory device and data storage method including address conversion circuit to convert coordinate information of data into one-dimensional information to amplifier
‌
US Patent 7911834 Analog interface for a flash memory die
‌
US Patent 7911851 Memory apparatus including programmable non-volatile multi-bit memory cell, and apparatus and method for demarcating memory states of the cell
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US Patent 7911865 Temperature compensation of memory signals using digital signals
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US Patent 7916512 Memory module having high data processing rate
‌
US Patent 7916520 Memory cell and magnetic random access memory
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US Patent 7916521 Magnetic random access memory and write method of the same
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US Patent 7916542 Nonvolatile memory device with multiple page regions, and methods of reading and precharging the same
‌
US Patent 7920402 Resistance variable memory apparatus
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US Patent 7920407 Set and reset detection circuits for reversible resistance switching memory material
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US Patent 7924594 Data writing and reading method for memory device employing magnetic domain wall movement
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US Patent 7924607 Magnetoresistance effect element and magnetoresistive random access memory using the same
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US Patent 7924608 Forced ion migration for chalcogenide phase change memory device
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US Patent 7924638 Redundancy architecture for an integrated circuit memory
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US Patent 7929331 Microelectronic programmable device and methods of forming and programming the same
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US Patent 7929340 Phase change memory cell and manufacturing method
‌
US Patent 7933146 Electronic devices utilizing spin torque transfer to flip magnetic orientation
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US Patent 7933149 Non-volatile memory device
‌
US Patent 7936596 Magnetic tunnel junction cell including multiple magnetic domains
‌
US Patent 7936597 Multilevel magnetic storage device
‌
US Patent 7936612 Phase change memory device generating program current and method thereof
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US Patent 7940552 Multiple level cell phase-change memory device having pre-reading operation resistance drift recovery, memory systems employing such devices and methods of reading memory devices
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US Patent 7940556 Resistance variable memory device with sputtered metal-chalcogenide region and method of fabrication
‌
US Patent 7944760 Read enhancement for memory
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US Patent 7952906 Information storage devices using magnetic domain wall movement and methods of manufacturing the same
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US Patent 7952913 Back gated SRAM cell
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US Patent 7952914 Memory devices including multi-bit memory cells having magnetic and resistive memory elements and related methods
‌
US Patent 7952918 Method of operating a magnetoresistive RAM
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US Patent 7952919 Phase change memory structure with multiple resistance states and methods of programming and sensing same
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US Patent 7957172 System for retaining state data of an integrated circuit
‌
US Patent 7957175 Information storage devices using movement of magnetic domain walls and methods of manufacturing the same
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US Patent 7957179 Magnetic shielding in magnetic multilayer structures
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US Patent 7957181 Magnetic tunnel junction magnetic memory
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US Patent 7961491 Data storage device using magnetic domain wall movement and method of operating the same
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US Patent 7961513 Method for programming a multilevel memory
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US Patent 7961528 Buffer control circuit of memory device
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US Patent 7965545 Reducing temporal changes in phase change memories
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US Patent 7965576 Apparatus for testing memory device
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US Patent 7969770 Programmable via devices in back end of line level
‌
US Patent 7969811 Semiconductor memory device highly integrated in direction of columns
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US Patent 7969813 Write command and write data timing circuit and methods for timing the same
‌
US Patent 7974119 Transmission gate-based spin-transfer torque memory unit
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US Patent 7974143 Memory system, a memory device, a memory controller and method thereof
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US Patent 7978490 Content addressable memory cell and content addressable memory using phase change memory
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US Patent 7978509 Phase change memory with dual word lines and source lines and method of operating same
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US Patent 7986551 Phase change random access memory device
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US Patent 7990759 Hardened memory cell
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US Patent 7990780 Multiple threshold voltage register file cell
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US Patent 7995378 MRAM device with shared source line
‌
US Patent 7995383 Magnetic tunnel junction cell adapted to store multiple digital values
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US Patent 8004881 Magnetic tunnel junction device with separate read and write paths
Edits on 8 Dec, 2021
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US Patent 8004881 Magnetic tunnel junction device with separate read and write paths
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edited on 8 Dec, 2021
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US Patent 7995383 Magnetic tunnel junction cell adapted to store multiple digital values
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edited on 8 Dec, 2021
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Infobox
Patent primary examiner of
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US Patent 7995378 MRAM device with shared source line
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edited on 8 Dec, 2021
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Infobox
Patent primary examiner of
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US Patent 7990780 Multiple threshold voltage register file cell
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edited on 8 Dec, 2021
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Infobox
Patent primary examiner of
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US Patent 7990759 Hardened memory cell
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edited on 8 Dec, 2021
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Infobox
Patent primary examiner of
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US Patent 7986551 Phase change random access memory device
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edited on 8 Dec, 2021
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Infobox
Patent primary examiner of
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US Patent 7978490 Content addressable memory cell and content addressable memory using phase change memory
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Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 7978509 Phase change memory with dual word lines and source lines and method of operating same
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edited on 8 Dec, 2021
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US Patent 7974143 Memory system, a memory device, a memory controller and method thereof
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edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 7974119 Transmission gate-based spin-transfer torque memory unit
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edited on 8 Dec, 2021
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Infobox
Patent primary examiner of
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US Patent 7969813 Write command and write data timing circuit and methods for timing the same
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edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 7969811 Semiconductor memory device highly integrated in direction of columns
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edited on 8 Dec, 2021
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US Patent 7969770 Programmable via devices in back end of line level
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edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 7965545 Reducing temporal changes in phase change memories
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edited on 8 Dec, 2021
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US Patent 7965576 Apparatus for testing memory device
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edited on 7 Dec, 2021
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US Patent 7961513 Method for programming a multilevel memory

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