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Steven Loke
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Edits on 14 Dec, 2021
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Golden AI
edited on 14 Dec, 2021
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Patent primary examiner of
US Patent 7087962 Method for forming a MOS transistor having lightly dopped drain regions and structure thereof
US Patent 7087975 Area efficient stacking of antifuses in semiconductor device
US Patent 7091552 High voltage power MOSFET having a voltage sustaining region that includes doped columns formed by trench etching and ion implantation
US Patent 7094640 Method of making a trench MOSFET device with improved on-resistance
US Patent 7095072 Semiconductor device with wiring layers forming a capacitor
US Patent 7102160 TFT LCD including a source line having an extension pattern in the channel layer
US Patent 7105385 FPGA blocks with adjustable porosity pass thru
US Patent 7105907 Gallium nitride compound semiconductor device having schottky contact
US Patent 7122431 Methods of fabrication metal oxide semiconductor (MOS) transistors having buffer regions below source and drain regions
US Patent 7129552 MOSFET structures with conductive niobium oxide gates
US Patent 7132748 Semiconductor apparatus
US Patent 7135730 Bias-independent capacitor based on superposition of nonlinear capacitors for analog/RF circuit applications
US Patent 7157338 Non-uniform power semiconductor and method for making non-uniform power semiconductor
US Patent 7211868 Protection circuit device using MOSFETs and a method of manufacturing the same
US Patent 7279370 Thin film transistor array substrate and method of fabricating the same
US Patent 7279715 Organic electroluminescent display device
US Patent 7279728 Variable capacitance device with high accuracy
US Patent 7289006 Method and apparatus for implementing common mode cable noise suppression for medium range frequencies
US Patent 7291525 System and method for manufacturing thin film resistors using a trench and chemical mechanical polishing
US Patent 7303985 Zeolite-carbon doped oxide composite low k dielectric
US Patent 7310175 MEMS device and method of forming MEMS device
US Patent 7314821 Method for fabricating a semiconductor interconnect having conductive spring contacts
US Patent 7316968 Methods of forming semiconductor devices having multiple channel MOS transistors
US Patent 7317205 Light emitting device and method of manufacturing a semiconductor device
US Patent 7323400 Plasma processing, deposition and ALD methods
US Patent 7326592 Stacked die package
US Patent 7326638 Method for manufacturing semiconductor device
US Patent 7326657 Post-deposition treatment to enhance properties of Si-O-C low k films
US Patent 7332431 Method of manufacturing semiconductor device
US Patent 7332818 Multi-chip electronic package with reduced line skew and circuitized substrate for use therein
US Patent 7335566 Polysilicon gate doping method and structure for strained silicon MOS transistors
US Patent 7335583 Isolating semiconductor device structures
US Patent 7335968 High permeability composite films to reduce noise in high speed interconnects
US Patent 7339228 Non-planar flash memory array with shielded floating gates on silicon mesas
US Patent 7339263 Integrated circuit packages, systems, and methods
US Patent 7345367 Magnetic memory device and producing method thereof
US Patent 7348645 Intelligent textile technology based on flexible semiconductor skins
US Patent 7351601 Methods of forming nanocavity laser structures
US Patent 7352071 Method of fabricating anti-warp package
US Patent 7355246 Memory cell without halo implant
US Patent 7358108 CMOS image sensor and method for fabricating the same
US Patent 7358126 Dual damascene structure and methods of forming the same
US Patent 7371645 Method of manufacturing a field effect transistor device with recessed channel and corner gate device
US Patent 7378327 Method for fabricating a junction varactor with high Q factor
US Patent 7378698 Magnetic tunnel junction and memory device including the same
US Patent 7381468 Polymer/ceramic composite paste for embedded capacitor and method for fabricating capacitor using same
US Patent 7381981 Phase-change TaN resistor based triple-state/multi-state read only memory
US Patent 7382667 Active termination circuit and method for controlling the impedance of external integrated circuit terminals
US Patent 7384845 Methods of fabricating flash memory devices including word lines with parallel sidewalls
US Patent 7385273 Power semiconductor device
US Patent 7387973 Method for improving low-K dielectrics by supercritical fluid treatments
US Patent 7388251 Non-planar flash memory array with shielded floating gates on silicon mesas
US Patent 7388268 Compound semiconductor multilayer structure, hall device, and hall device manufacturing method
US Patent 7391078 Non-volatile memory and manufacturing and operating method thereof
US Patent 7391117 Method for fabricating semiconductor components with conductive spring contacts
US Patent 7393757 Method for separating semiconductor wafer from supporting member, and apparatus using the same
US Patent 7396737 Method of forming shallow trench isolation
US Patent 7397107 Ferromagnetic capacitor
US Patent 7411244 Low power electrically alterable nonvolatile memory cells and arrays
US Patent 7413970 Process of forming an electronic device including a semiconductor fin
US Patent 7425726 Electroabsorption modulators and methods of making the same
US Patent 7427522 Short-wavelength laser module and method of producing the same
US Patent 7432570 Semiconductor device and manufacturing method thereof
US Patent 7442605 Resistively switching memory
US Patent 7462554 Method for forming semiconductor device with modified channel compressive stress
US Patent 7470990 Low moisture absorptive circuitized substrate with reduced thermal expansion, method of making same, electrical assembly utilizing same, and information handling system utilizing same
US Patent 7476920 6F
US Patent 7479425 Method for forming high-K charge storage device
US Patent 7482223 Multi-thickness dielectric for semiconductor memory
US Patent 7482622 Dual panel type organic electroluminescent device and method of fabricating the same
US Patent 7482623 Organic semiconductor film and organic semiconductor device
US Patent 7482648 Electronic device and method of manufacturing the same
US Patent 7486307 Semiconductor apparatus having conductive layers and semiconductor thin films
US Patent 7488967 Structure for confining the switching current in phase memory (PCM) cells
US Patent 7489022 Radio frequency over-molded leadframe package
US Patent 7489038 Design of BEOL patterns to reduce the stresses on structures below chip bondpads
US Patent 7491574 Reducing oxidation of phase change memory electrodes
US Patent 7491992 Image sensor cells
US Patent 7492023 Solid state imaging device
US Patent 7508015 Semiconductor device using a nitride semiconductor
US Patent 7508038 ESD protection transistor
US Patent 7510963 Semiconductor device having multilayer interconnection structure and manufacturing method thereof
US Patent 7514328 Method for making a semiconductor device including shallow trench isolation (STI) regions with a superlattice therebetween
US Patent 7514766 Semiconductor device
US Patent 7528417 Light-emitting diode device and production method thereof
US Patent 7550357 Semiconductor device and fabricating method thereof
US Patent 7560807 Arrangement of semiconductor memory devices and semiconductor memory module comprising an arrangement of semiconductor memory devices
US Patent 7564065 Light emitting device and a lighting apparatus
US Patent 7564086 Self-aligned, silicided, trench-based DRAM/eDRAM processes with improved retention
US Patent 7569496 Method for manufacturing SiC semiconductor device
US Patent 7579620 Field-effect transistor comprising a layer of an organic semiconductor
US Patent 7582199 Plating method
US Patent 7582967 Semiconductor device, electronic module, and method of manufacturing electronic module
US Patent 7589007 MESFETs integrated with MOSFETs on common substrate and methods of forming the same
US Patent 7598098 Monitoring the reduction in thickness as material is removed from a wafer composite and test structure for monitoring removal of material
US Patent 7601636 Implementation of a metal barrier in an integrated electronic circuit
US Patent 7608873 Buried-gated photodiode device and method for configuring and operating same
US Patent 7619239 Semiconductor device and method of manufacturing the same
US Patent 7619251 Laser crystallization method suppressing propagation of cracks forming a display device
US Patent 7619312 Method and apparatus for precisely aligning integrated circuit chips
US Patent 7625777 Memory device having highly integrated cell structure and method of its fabrication
US Patent 7626191 Lateral phase change memory with spacer electrodes
US Patent 7638829 Capacitor of dynamic random access memory and method of manufacturing the capacitor
US Patent 7645701 Silicon-on-insulator structures for through via in silicon carriers
US Patent 7659161 Methods of forming storage nodes for a DRAM array
US Patent 7659560 Transistor structures
US Patent 7663133 Memory elements having patterned electrodes and method of forming the same
US Patent 7663219 Semiconductor device and method of manufacturing the same
US Patent 7663243 Semiconductor memory device comprising pseudo ground pad and related method
US Patent 7666727 Semiconductor device having a laterally modulated gate workfunction and method of fabrication
US Patent 7667219 Reduced current phase-change memory device
US Patent 7667303 Multi-chip package
US Patent 7678686 Semiconductor device having copper metal line and method of forming the same
US Patent 7679080 Functional molecular device
US Patent 7679128 Semiconductor device and method of fabricating the same
US Patent 7682924 Methods of forming a plurality of capacitors
US Patent 7687811 Vertical light emitting device having a photonic crystal structure
US Patent 7696005 Method for manufacturing an electronic module in an installation base
US Patent 7696607 Semiconductor device
US Patent 7700386 Packaging method of LED of high heat-conducting efficiency and structure thereof
US Patent 7705275 Substrate support having brazed plates and resistance heater
US Patent 7705393 Nonvolatile semiconductor storage device having silicide in control gate electrode
US Patent 7713868 Strained metal nitride films and method of forming
US Patent 7714315 Thermal isolation of phase change memory cells
US Patent 7714411 Electro-optical device, method of manufacturing the same, and electronic apparatus
US Patent 7719101 Semiconductor device with surface-mountable external contacts and method for manufacturing the same
US Patent 7723779 Integrated semiconductor nonvolatile storage device
US Patent 7727855 Fabrication of aligned nanowire lattices
US Patent 7728337 Light emitting diode assembly and light emitting diode display device
US Patent 7728413 Resin mold type semiconductor device
US Patent 7728424 Semiconductor device and method of manufacturing the same
US Patent 7741190 Method of selective oxygen implantation to dielectrically isolate semiconductor devices using no extra masks
US Patent 7741648 Penetrating hole type LED chip package structure using a ceramic material as a substrate and method for manufacturing the same
US Patent 7745287 Floating trap type nonvolatile memory device and method of fabricating the same
US Patent 7745291 Method of fabricating a high-voltage transistor with an extended drain structure
US Patent 7759683 White light emitting diode
US Patent 7772682 Moisture protection metal enclosure
US Patent 7777318 Wafer level packaging integrated hydrogen getter
US Patent 7786498 Light emitting device and package having the same
US Patent 7786524 Semiconductor device and method of manufacturing the same
US Patent 7786561 Encapsulated microcomponent equipped with at least one getter
US Patent 7791119 Electro-resistance element and electro-resistance memory using the same
US Patent 7795047 Current balancing in NPN BJT and BSCR snapback devices
US Patent 7799637 Scaled dielectric enabled by stack sidewall process
US Patent 7800228 Reliable via contact interconnect structure
US Patent 7800879 On-chip sensor array for temperature management in integrated circuits
US Patent 7803679 Method of forming a vertical diode and method of manufacturing a semiconductor device using the same
US Patent 7807521 Nitride semiconductor light emitting device and method of manufacturing the same
US Patent 7807563 Method for manufacturing a layer arrangement and layer arrangement
US Patent 7812437 Flip chip MLP with folded heat sink
US Patent 7812438 Via offsetting to reduce stress under the first level interconnect (FLI) in microelectronics packaging
US Patent 7825008 Method of fabricating light emitting device and thus-fabricated light emitting device
US Patent 7825495 Semiconductor chip structure, method of manufacturing the semiconductor chip structure, semiconductor chip package, and method of manufacturing the semiconductor chip package
US Patent 7825501 High bond line thickness for semiconductor devices
US Patent 7830015 Memory device with improved data retention
US Patent 7830028 Semiconductor test structures
US Patent 7833827 Method of making a semiconductor chip assembly with a bumped terminal, a filler and an insulative base
US Patent 7833852 Source/drain stressors formed using in-situ epitaxial growth
US Patent 7838413 Method of manufacturing phase-change memory element
US Patent 7838415 Method of fabricating dual damascene structure
US Patent 7847370 Semiconductor device with resistor and fuse and method of manufacturing the same
US Patent 7851267 Power semiconductor module method
US Patent 7851776 Phase change RAM device
US Patent 7851823 Semiconductor photodetector device
US Patent 7851839 High-sensitivity image sensor and fabrication method thereof
US Patent 7851920 Wire structure, method for fabricating wire, thin film transistor substrate, and method for fabricating thin film transistor substrate
US Patent 7859039 X-shaped semiconductor capacitor structure
US Patent 7863149 Method for fabricating a capacitor
US Patent 7863702 Image sensor package and method of manufacturing the same
US Patent 7863706 Circuit system with circuit element
US Patent 7867845 Transistor gate forming methods and transistor structures
US Patent 7868393 Space efficient integrated circuit with passive devices
US Patent 7871921 Methods of forming interconnection structures for semiconductor devices
US Patent 7872327 Semiconductor integrated circuit device and method of producing the same
US Patent 7872333 Layer system comprising a silicon layer and a passivation layer, method for production a passivation layer on a silicon layer and the use of said system and method
US Patent 7879657 Semiconductor device and manufacturing method thereof
US Patent 7879665 Structure and method of fabricating a transistor having a trench gate
US Patent 7880288 Semiconductor module with semiconductor chips and method for producing it
US Patent 7880300 Semiconductor chip comprising a metal coating structure and associated production method
US Patent 7884457 Integrated circuit package system with dual side connection
US Patent 7888745 Bipolar transistor with dual shallow trench isolation and low base resistance
US Patent 7897984 Light-emitting diode chip package body and packaging method thereof
US Patent 7906423 Semiconductor device and method of manufacturing the same
US Patent 7923278 Integrated getter area for wafer level encapsulated microelectromechanical systems
US Patent 7923986 Device and method for measuring a current flowing in an electrical conductor
US Patent 7928519 Method for manufacturing capacitive sensor, and capacitive sensor
US Patent 7932541 High performance collector-up bipolar transistor
US Patent 7943400 Integrated circuit device with electronically accessible device identifier
US Patent 7943941 Device for emitting various colors
US Patent 7947533 Void free soldering semiconductor chip attachment method for wafer scale chip size
US Patent 7951666 Deep trench capacitor and method
US Patent 7952168 Substrate strip for semiconductor packages
US Patent 7960814 Stress relief of a semiconductor device
US Patent 7973382 Semiconductor device
US Patent 7973413 Through-substrate via for semiconductor device
US Patent 7981771 Structures and methods to enhance Cu interconnect electromigration (EM) performance
US Patent 7985646 Method of fabricating nanowire memory device and system of controlling nanowire formation used in the same
US Patent 7985694 Method for forming pattern, method for manufacturing semiconductor device and semiconductor device
US Patent 7985998 Trench-type semiconductor device structure
US Patent 7989817 Light-emitting diode chip package body and packaging method thereof
US Patent 7989908 Image sensor and method for manufacturing the same
US Patent 7993939 Integrated circuit package system with laminate base
US Patent 7993957 Phase change memory cell and manufacturing method thereof using minitrenches
US Patent 7998817 Method of fabricating a high-voltage transistor with an extended drain structure
US Patent 8003413 Penetrating hole type LED chip package structure using a ceramic material as a substrate and method for manufacturing the same
US Patent 8004096 Semiconductor device and a manufacturing method thereof
US Patent 8008144 Dual work function recessed access device and methods of forming
US Patent 8008157 CMOS device with raised source and drain regions
Edits on 8 Dec, 2021
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 8008144 Dual work function recessed access device and methods of forming
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 8008157 CMOS device with raised source and drain regions
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 8004096 Semiconductor device and a manufacturing method thereof
Golden AI
edited on 8 Dec, 2021
Edits made to:
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Infobox
Patent primary examiner of
US Patent 8003413 Penetrating hole type LED chip package structure using a ceramic material as a substrate and method for manufacturing the same
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
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Patent primary examiner of
US Patent 7998817 Method of fabricating a high-voltage transistor with an extended drain structure
Golden AI
edited on 8 Dec, 2021
Edits made to:
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+1
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Patent primary examiner of
US Patent 7993957 Phase change memory cell and manufacturing method thereof using minitrenches
Golden AI
edited on 8 Dec, 2021
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+1
properties)
Infobox
Patent primary examiner of
US Patent 7993939 Integrated circuit package system with laminate base
Edits on 8 Dec, 2021
Golden AI
edited on 8 Dec, 2021
Edits made to:
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Patent primary examiner of
US Patent 7989908 Image sensor and method for manufacturing the same
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7989817 Light-emitting diode chip package body and packaging method thereof
Golden AI
edited on 8 Dec, 2021
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properties)
Infobox
Patent primary examiner of
US Patent 7985998 Trench-type semiconductor device structure
Golden AI
edited on 8 Dec, 2021
Edits made to:
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Patent primary examiner of
US Patent 7985694 Method for forming pattern, method for manufacturing semiconductor device and semiconductor device
Golden AI
edited on 8 Dec, 2021
Edits made to:
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+1
properties)
Infobox
Patent primary examiner of
US Patent 7985646 Method of fabricating nanowire memory device and system of controlling nanowire formation used in the same
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
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+1
properties)
Infobox
Patent primary examiner of
US Patent 7981771 Structures and methods to enhance Cu interconnect electromigration (EM) performance
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
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+1
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Infobox
Patent primary examiner of
US Patent 7973413 Through-substrate via for semiconductor device
Golden AI
edited on 8 Dec, 2021
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properties)
Infobox
Patent primary examiner of
US Patent 7973382 Semiconductor device
Golden AI
edited on 7 Dec, 2021
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Patent primary examiner of
US Patent 7960814 Stress relief of a semiconductor device
Golden AI
edited on 7 Dec, 2021
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Patent primary examiner of
US Patent 7952168 Substrate strip for semiconductor packages
Golden AI
edited on 7 Dec, 2021
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Patent primary examiner of
US Patent 7951666 Deep trench capacitor and method
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
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Patent primary examiner of
US Patent 7947533 Void free soldering semiconductor chip attachment method for wafer scale chip size
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