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Huan Hoang

CEO of Entertainment Software Association

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Patent primary examiner of
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US Patent 11170840 SRAM write assist device and method
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US Patent 7088623 Non-volatile memory technology suitable for flash and byte operation application
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US Patent 7092292 Noise reduction technique for transistors and small devices utilizing an episodic agitation
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US Patent 7095665 Sense amplifier driver and semiconductor device comprising the same
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US Patent 7099173 Stacked layered type semiconductor memory device
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US Patent 7099187 Read/write circuit for accessing chalcogenide non-volatile memory cells
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US Patent 7099189 SRAM cell controlled by non-volatile memory cell
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US Patent 7099200 Nonvolatile semiconductor memory
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US Patent 7099216 Single cycle read/write/writeback pipeline, full-wordline I/O DRAM architecture with enhanced write and single ended sensing
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US Patent 7099217 Semiconductor memory with sense amplifier equalizer having transistors with gate oxide films of different thicknesses
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US Patent 7099232 Delay locked loop device
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US Patent 7102907 Wavelength division multiplexed memory module, memory system and method
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US Patent 7102910 Programmable non-volatile semiconductor memory device
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US Patent 7102913 Sensing scheme for programmable resistance memory using voltage coefficient characteristics
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US Patent 7102926 Integrated circuit memory devices including programmed memory cells and programmable and erasable memory cells
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US Patent 7102939 Semiconductor memory device having column address path therein for reducing power consumption
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US Patent 7105914 Integrated circuit and seed layers
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US Patent 7106611 Wavelength division multiplexed memory module, memory system and method
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US Patent 7106616 Ferroelectric memory with improved life span
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US Patent 7106621 Random access memory array with parity bit structure
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US Patent 7110276 Integrated circuit memory devices reducing propagation delay differences between signals transmitted to separate spaced-apart memory blocks therein
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US Patent 7110296 Flash memory device capable of improving a data loading speed
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US Patent 7110298 Non-volatile system with program time control
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US Patent 7113421 Semiconductor integrated circuit device
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US Patent 7113422 Method for optimizing MRAM circuit performance
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US Patent 7113440 Semiconductor memory device saving power during self refresh operation
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US Patent 7116586 Non-volatile semiconductor memory device and semiconductor disk device
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US Patent 7116588 Low supply voltage temperature compensated reference voltage generator and method
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US Patent 7116605 Dual port SRAM cell
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US Patent 7120058 Circuit and method for controlling boosting voltage
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US Patent 7123524 Input circuit having updated output signal synchronized to clock signal
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US Patent 7123534 Semiconductor memory device having short refresh time
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US Patent 7126835 Semiconductor memory device
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US Patent 7126839 Nonvolatile ferroelectric memory cell and memory device using the same
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US Patent 7126864 Memory device capable of changing data output mode
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US Patent 7126866 Low power ROM architecture
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US Patent 7126872 Semiconductor integrated circuit
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US Patent 7130209 Flexible OTP sector protection architecture for flash memories
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US Patent 7130224 Composite storage circuit and semiconductor device having the same composite storage circuit
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US Patent 7130238 Divisible true dual port memory system supporting simple dual port memory subsystems
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US Patent 7133319 Programmable weak write test mode (PWWTM) bias generation having logic high output default mode
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US Patent 11176979 Computational random access memory (CRAM) based on spin-orbit torque devices
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US Patent 11176986 Memory context restore, reduction of boot time of a system on a chip by reducing double data rate memory training
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US Patent 11176987 Dram array architecture with row hammer stress mitigation
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US Patent 11176991 Compute-in-memory (CIM) employing low-power CIM circuits employing static random access memory (SRAM) bit cells, particularly for multiply-and-accumluate (MAC) operations
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US Patent 7142455 Positive gate stress during erase to improve retention in multi-level, non-volatile flash memory
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US Patent 7142472 Semiconductor memory device and method for testing same
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US Patent 7149117 Reduction of adjacent floating gate data pattern sensitivity
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US Patent 7149121 Method and apparatus for changing operating conditions of nonvolatile memory
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US Patent 7154772 MRAM architecture with electrically isolated read and write circuitry
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US Patent 7154779 Non-volatile memory cell using high-k material inter-gate programming
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US Patent 7154785 Charge pump circuitry having adjustable current outputs
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US Patent 7154786 Semiconductor integrated circuit device
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US Patent 7154794 Memory regulator system with test mode
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US Patent 7158405 Semiconductor memory device having a plurality of memory areas with memory elements
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US Patent 7158412 On-chip EE-PROM programming waveform generation
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US Patent 7158437 Memory control device and memory control method
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US Patent 7161835 Non-volatile semiconductor memory device
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US Patent 7164593 Semiconductor integrated circuit
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US Patent 7170786 Deep wordline trench to shield cross coupling between adjacent cells for scaled NAND
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US Patent 7170811 Separate variable power supply to on-chip memory using existing power supplies
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US Patent 7170812 Semiconductor memory device capable of reducing power consumption during reading and standby
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US Patent 7173846 Magnetic RAM and array architecture using a two transistor, one MTJ cell
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US Patent 7177213 Capacitor supported precharging of memory digit lines
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US Patent 7177220 Refresh counter with dynamic tracking of process, voltage and temperature variation for semiconductor memory
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US Patent 7180768 Semiconductor memory device including 4TSRAMs
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US Patent 7180806 Memory device, refresh control circuit to be used for the memory device, and refresh method
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US Patent 7184309 Non-volatile semiconductor memory device
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US Patent 7184316 Non-volatile memory cell array having common drain lines and method of operating the same
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US Patent 7184321 Data line disturbance free memory block divided flash memory and microcomputer having flash memory therein
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US Patent 7187570 Content addressable memory architecture providing improved speed
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US Patent 7187588 Semiconductor storage
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US Patent 7187589 Non-volatile semiconductor memory and method for writing data into a non-volatile semiconductor memory
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US Patent 7187595 Replenishment for internal voltage
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US Patent 7187599 Integrated circuit chip having a first delay circuit trimmed via a second delay circuit
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US Patent 7187607 Semiconductor memory device and method for manufacturing same
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US Patent 7190622 Method and architecture to calibrate read operations in synchronous flash memory
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US Patent 7190626 Memory system with bit-line discharging mechanism
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US Patent 7190631 Multi-port memory
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US Patent 7196937 Semiconductor integrated circuit with flash interface
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US Patent 7196938 Charge-sharing technique during flash memory programming
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US Patent 7196960 Semiconductor integrated circuit
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US Patent 7196966 On die termination mode transfer circuit in semiconductor memory device and its method
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US Patent 7200021 Stacked DRAM memory chip for a dual inline memory module (DIMM)
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US Patent 7200023 Dual-edged DIMM to support memory expansion
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US Patent 7200050 Memory unit and semiconductor device
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US Patent 7203092 Flash memory array using adjacent bit line as source
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US Patent 7203093 Method and apparatus for reading NAND flash memory array
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US Patent 7206222 Thin-film magnetic memory device executing data writing with data write magnetic fields in two directions
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US Patent 7206225 Method of dynamically controlling program verify levels in multilevel memory cells
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US Patent 7206232 Semiconductor device and source voltage control method
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US Patent 7209379 Storage device and semiconductor device
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US Patent 7212422 Stacked layered type semiconductor memory device
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US Patent 7212427 Ferroelectric memory
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US Patent 7212442 Structure for directly burning program into motherboard
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US Patent 7212450 FeRAM having differential data
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US Patent 7212457 Method and apparatus for implementing high speed memory
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US Patent 7215596 Circuit and method for controlling inversion of delay locked loop and delay locked loop and synchronous semiconductor memory device using the same
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US Patent 7215597 Memory device having components for transmitting and receiving signals synchronously
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US Patent 7218542 Physical priority encoder
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US Patent 7218551 Multiple level cell memory device with single bit per cell, re-mappable memory block
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US Patent 7218558 Semiconductor memory devices having column redundancy circuits therein that support multiple memory blocks
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US Patent 7218559 Memory device having redundant memory for repairing defects
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US Patent 7218560 Semiconductor memory device
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US Patent 7218569 Memory circuit, and method for reading out data contained in the memory circuit using shared command signals
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US Patent 7221587 Semiconductor device and programming method
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US Patent 7221608 Single NMOS device memory cell and array
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US Patent 7221617 Backwards-compatible memory module
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US Patent 7224603 SRAM cell controlled by flash memory cell
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US Patent 7224606 Semiconductor memory device and method of controlling semiconductor memory device
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US Patent 7224638 Reliability clock domain crossing
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US Patent 7227775 Two terminal memory array having reference cells
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US Patent 7227789 Method and apparatus for filtering output data
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US Patent 7227790 NOR flash memory device with a serial sensing operation and method of sensing data bits in a NOR flash memory device
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US Patent 7230842 Memory cell having p-type pass device
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US Patent 7230853 Selective erase method for flash memory
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US Patent 7233512 Content addressable memory circuit with improved memory cell stability
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US Patent 7233537 Thin film magnetic memory device provided with a dummy cell for data read reference
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US Patent 7236385 Memory architecture
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US Patent 7236388 Driving method of variable resistance element and memory device
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US Patent 7242615 Non-volatile semiconductor memory device
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US Patent 7242629 High speed latch circuits using gated diodes
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US Patent 7242633 Memory device and method of transferring data in memory device
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US Patent 7242636 Clock control circuit and semiconductor memory device including the same and input operation method of semiconductor memory device
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US Patent 7248491 Circuit for and method of implementing a content addressable memory in a programmable logic device
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US Patent 7248517 Semiconductor memory device having local data line pair with delayed precharge voltage application point
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US Patent 7248522 Sense amplifier power-gating technique for integrated circuit memory devices and those devices incorporating embedded dynamic random access memory (DRAM)
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US Patent 7248532 Device, system and method for reducing power in a memory device during standby modes
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US Patent 7251156 Magnetic memory architecture with shared current line
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US Patent 7251181 Techniques for storing accurate operating current values
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US Patent 7254075 Integrated circuit memory system having dynamic memory bank count and page size
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US Patent 7257035 Method for detecting data strobe signal
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US Patent 7257037 Redundancy circuit in semiconductor memory device
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US Patent 7260000 Control signal interface circuit for computer memory modules
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US Patent 7262998 Non-volatile system with program time control
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US Patent 7263009 Semiconductor memory device with delay section
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US Patent 7269049 Ferroelectric random access memory device
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US Patent 7269053 Semiconductor memory device and semiconductor device group
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US Patent 7269056 Power grid design for split-word line style memory cell
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US Patent 7269063 Floating gate memory with split-gate read transistor and split gate program transistor memory cells and method for making the same
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US Patent 7269066 Programming memory devices
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US Patent 7269069 Non-volatile memory and method with bit line to bit line coupled compensation
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US Patent 7269076 Low power consumption data input/output circuit of embedded memory device and data input/output method of the circuit
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US Patent 7269086 Semiconductor memory device and semiconductor device
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US Patent 7269088 Identical chips with different operations in a system
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US Patent 7269089 Divisible true dual port memory system supporting simple dual port memory subsystems
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US Patent 7274588 Compact and highly efficient DRAM cell
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US Patent 7274596 Reduction of adjacent floating gate data pattern sensitivity
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US Patent 7274611 Method and architecture to calibrate read operations in synchronous flash memory
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US Patent 7277325 Semiconductor memory device
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US Patent 7280396 Non-volatile memory and control with improved partial page program capability
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US Patent 7280429 Data latch circuit of semiconductor device and method for latching data signal
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US Patent 7280431 Method of generating an internal clock for a semiconductor memory device and semiconductor memory device using the same
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US Patent 7283382 Minimization of signal loss due to self-erase of imprinted data
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US Patent 7283383 Phase change resistor cell, nonvolatile memory device and control method using the same
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US Patent 7283384 Magnetic memory array architecture
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US Patent 7283398 Method for minimizing false detection of states in flash memory devices
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US Patent 7283400 Nonvolatile semiconductor storage device
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US Patent 7283407 Semiconductor memory device
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US Patent 7286377 Dynamic random access memory device and method for self-refreshing memory cells with temperature compensated self-refresh
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US Patent 7286388 Resistive memory device with improved data retention
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US Patent 7286421 Active compensation for operating point drift in MRAM write operation
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US Patent 7286428 Offset compensated sensing for magnetic random access memory
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US Patent 7292468 Magnetic random access memory
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US Patent 7295475 Flash memory programming using an indication bit to interpret state
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US Patent 7295476 Data line disturbance free memory block divided flash memory and microcomputer having flash memory therein
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US Patent 7295486 Memory and driving method therefor
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US Patent 7298641 Configurable storage device
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US Patent 7298648 Page buffer and multi-state nonvolatile memory device including the same
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US Patent 7298667 Latency control circuit and method of latency control
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US Patent 7301800 Multi-bit magnetic random access memory element
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US Patent 7301812 Boosting to control programming of non-volatile memory
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US Patent 7301847 Method and device for a main board commonly associated with DDR2 or DDR1
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US Patent 7304899 Integrated semiconductor memory
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US Patent 7304902 Pre-charge voltage supply circuit of semiconductor device
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US Patent 7307865 Integrated read-only memory, method for operating said read-only memory and corresponding production method
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US Patent 7307894 Semiconductor device and control method of the same
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US Patent 7307895 Self test for the phase angle of the data read clock signal DQS
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US Patent 7310281 Semiconductor memories with refreshing cycles
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US Patent 7313030 Differential flash memory programming technique
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US Patent 7313035 Methods and apparatus for improved memory access
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US Patent 7313036 Memory device having open bit line architecture for improving repairability and method of repairing the same
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US Patent 7315465 Methods of operating and forming chalcogenide glass constant current devices
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US Patent 7315481 Semiconductor memory
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US Patent 7317653 Semiconductor memory device having sense amp over-driving structure and method of over-driving sense amplifier thereof
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US Patent 7317657 Semiconductor memory device, system with semiconductor memory device, and method for operating a semiconductor memory device
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US Patent 7319613 NROM flash memory cell with integrated DRAM
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US Patent 7319617 Small sector floating gate flash memory
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US Patent 7321503 Method of driving memory device to implement multiple states
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US Patent 7321512 Ramp generator and relative row decoder for flash memory device
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US Patent 7321513 Semiconductor device and method of generating a reference voltage therefor
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US Patent 7321521 Assessing energy requirements for a refreshed device
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US Patent 7324369 MRAM embedded smart power integrated circuits
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US Patent 7324399 Refresh control circuit and method for performing a repetition refresh operation and semiconductor memory device having the same
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US Patent 7327600 Storage controller for multiple configurations of vertical memory
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US Patent 7327622 Semiconductor device
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US Patent 7330370 Enhanced functionality in a two-terminal memory array
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US Patent 7330372 Non-volatile semiconductor memory device
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US Patent 7330392 Dual port semiconductor memory device
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US Patent 7330394 Information storage device, information storage method, and information storage program
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US Patent 7333365 Page buffer of flash memory device with improved program operation performance and program operation control method
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US Patent 7333384 Techniques for storing accurate operating current values
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US Patent 7333390 Phase controlled high speed interfaces
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US Patent 7336531 Multiple level cell memory device with single bit per cell, re-mappable memory block
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US Patent 7336542 Nonvolatile latch
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US Patent 7339834 Starting program voltage shift with cycling of non-volatile memory
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US Patent 7339843 Methods and circuits for programming addresses of failed memory cells in a memory device
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US Patent 7339845 Memory device
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US Patent 7345903 Nonvolatile semiconductor memory device to which information can be written only once
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US Patent 7345924 Programming memory devices
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US Patent 7345930 Write circuit of memory device
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US Patent 7349261 Method for increasing programming speed for non-volatile memory by applying counter-transitioning waveforms to word lines
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US Patent 7349284 Memory array with staged output
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US Patent 7349285 Dual port memory unit using a single port memory core
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US Patent 7352611 Semiconductor integrated circuit
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US Patent 7352615 Magnetic memory device
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US Patent 7352616 Phase change random access memory, boosting charge pump and method of generating write driving voltage
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US Patent 7352617 Nano tube cell and memory device using the same
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US Patent 7352619 Electronic memory with binary storage elements
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US Patent 7352624 Reduction of adjacent floating gate data pattern sensitivity
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US Patent 7352628 Systems for programming differently sized margins and sensing with compensations at select states for improved read operations in a non-volatile memory
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US Patent 7352650 External clock synchronization semiconductor memory device and method for controlling same
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US Patent 7355881 Memory array with global bitline domino read/write scheme
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US Patent 7355909 Column redundancy reuse in memory devices
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US Patent 7359231 Providing current for phase change memories
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US Patent 7359244 Non-volatile semiconductor memory device and semiconductor disk device
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US Patent 7359246 Memory device with a ramp-like voltage biasing structure based on a current generator
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US Patent 7359266 Precharge circuit and method employing inactive weak precharging and equalizing scheme and memory device including the same
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US Patent 7359271 Gate induced drain leakage current reduction by voltage regulation of master wordline
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US Patent 7359277 High speed power-gating technique for integrated circuit devices incorporating a sleep mode of operation
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US Patent 7359281 Read and/or write detection system for an asynchronous memory array
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US Patent 7362603 Stagger memory cell array
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US Patent 7362626 Asynchronous, high-bandwidth memory component using calibrated timing elements
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US Patent 7362649 Memory control device and memory control method
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US Patent 11183231 Apparatus for enhancing prefetch access in memory module
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US Patent 11183498 Semiconductor memory device having an electrically floating body transistor
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US Patent 11183628 Magnetic memory device
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US Patent 7366046 DRAM density enhancements
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US Patent 7369431 Method for initializing resistance-variable material, memory device containing a resistance-variable material, and method for initializing nonvolatile memory circuit including variable resistor
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US Patent 7372734 Methods of operating electrically alterable non-volatile memory cell
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US Patent 7372740 Semiconductor memory device
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US Patent 7372742 Memory block erasing in a flash memory device
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US Patent 7372763 Memory with spatially encoded data storage
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US Patent 7372765 Power-gating system and method for integrated circuit devices
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US Patent 7376017 Flash memory device and program method thereof
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US Patent 7376041 Semiconductor memory device and data read and write method of the same
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US Patent 7379316 Methods and apparatus of stacking DRAMs
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US Patent 7379329 Addressing architecture for perpendicular giant magnetoresistance memory
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US Patent 7379331 Nonvolatile semiconductor memory including redundant cell for replacing defective cell
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US Patent 7379332 Systems-on-chips including programmed memory cells and programmable and erasable memory cells
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US Patent 7379338 Method and system for regulating a program voltage value during multilevel memory device programming
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US Patent 7379363 Method and apparatus for implementing high speed memory
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US Patent 7382640 High-speed programmable ROM, memory cell structure therefor, and method for writing data on/reading data from the programmable ROM
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US Patent 7382644 Two terminal memory array having reference cells
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US Patent 7382645 Two terminal memory array having reference cells
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US Patent 7382665 Method for detecting data strobe signal
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US Patent 7385846 Reduction of adjacent floating gate data pattern sensitivity
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US Patent 7385848 Semiconductor storage device and electronic equipment
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US Patent 7385852 Circuit for generating step-up voltage in non-volatile memory device
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US Patent 7385860 Data output circuit of synchronous memory device
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US Patent 7385861 Synchronization circuit for DDR IO interface
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US Patent 7388783 Nonvolatile semiconductor memory
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US Patent 7388795 Modular memory controller clocking architecture
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US Patent 7391651 Method for programming NAND flash memory device and page buffer performing the same
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US Patent 7391670 Semiconductor memory device
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US Patent 7394688 Nonvolatile memory
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US Patent 7394720 Circuit and method for sampling valid command using extended valid address window in double pumped address scheme memory device
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US Patent 7394721 Method and apparatus for data synchronization to local clock on memory reads
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US Patent 7397681 Nonvolatile memory devices having enhanced bit line and/or word line driving capability
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US Patent 7397685 Semiconductor memory device having error checking and correcting circuit
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US Patent 7397694 Magnetic memory arrays
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US Patent 7397702 Read/verify circuit for multilevel memory cells with ramp read voltage, and read/verify method thereof
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US Patent 7397715 Semiconductor memory device for testing redundancy cells
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US Patent 7400535 System that compensates for coupling during programming
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US Patent 7400546 Low overhead switched header power savings apparatus
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US Patent 7403410 Switch device and method
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US Patent 7403417 Non-volatile semiconductor memory device and method for operating a non-volatile memory device
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US Patent 7403421 Noise reduction technique for transistors and small devices utilizing an episodic agitation
‌
US Patent 7403435 Memory unit and semiconductor device
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US Patent 7403439 Bitline leakage limiting with improved voltage regulation
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US Patent 7403442 Pulse controlled word line driver
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US Patent 7405957 Edge pad architecture for semiconductor memory
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US Patent 7405968 Non-volatile memory cell using high-K material and inter-gate programming
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US Patent 7405972 Non-volatile memory array
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US Patent 7405977 Flash memory device with improved read speed
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US Patent 7405981 Circuit for data bit inversion
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US Patent 7405993 Control component for controlling a semiconductor memory component in a semiconductor memory module
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US Patent 7408803 Method for writing to magnetoresistive memory cells and magnetoresistive memory which can be written to by the method
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US Patent 7408814 Method and apparatus for filtering output data
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US Patent 7408815 SRAM cell controlled by flash memory cell
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US Patent 7408816 Memory voltage generating circuit
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US Patent 7408818 Semiconductor device undergoing defect detection test
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US Patent 7411821 Method and apparatus to protect nonvolatile memory from viruses
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US Patent 7411827 Boosting to control programming of non-volatile memory
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US Patent 7411837 Method for operating an electrical writable and erasable memory cell and a memory device for electrical memories
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US Patent 7411850 Semiconductor storage device
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US Patent 7414904 Method for evaluating storage cell design using a wordline timing and cell access detection circuit
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US Patent 7417898 Non-volatile semiconductor memory device
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US Patent 7417911 Semiconductor memory device having hierarchically structured data lines and precharging means
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US Patent 7420831 Semiconductor chip and semiconductor chip package comprising semiconductor chip
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US Patent 7420834 Semiconductor integrated circuit device
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US Patent 7420845 High-endurance memory device
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US Patent 7420852 Non-volatile memory device providing controlled bulk voltage during programming operations
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US Patent 7420853 Semiconductor storage device and semiconductor storage device driving method
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US Patent 7420856 Methods and circuits for generating a high voltage and related semiconductor memory devices
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US Patent 7420873 Simplified power-down mode control circuit utilizing active mode operation control signals
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US Patent 7423902 Storage device and semiconductor apparatus
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US Patent 7423909 Semiconductor integrated circuit device
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US Patent 7423912 SONOS memory array with improved read disturb characteristic
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US Patent 7423923 Capacitor supported precharging of memory digit lines
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US Patent 7423924 Semiconductor memory device
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US Patent 7426130 Ferroelectric RAM device and driving method
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US Patent 7426141 Semiconductor memory device
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US Patent 7426152 Semiconductor memory device and semiconductor device
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US Patent 7428184 Circuit arrangement for generating an n-bit output pointer, semiconductor memory and method for adjusting a read latency
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US Patent 7430145 System and method for avoiding attempts to access a defective portion of memory
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US Patent 7430150 Method and system for providing sensing circuitry in a multi-bank memory device
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US Patent 7430151 Memory with clocked sense amplifier
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US Patent 7433235 Bias circuits and methods for enhanced reliability of flash memory device
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US Patent 7433236 Multi-voltage generator generating program voltage, read voltage and high voltage in response to operating mode of flash memory device
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US Patent 7433240 Page buffer circuit of flash memory device with dual page program function and program operation method thereof
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US Patent 7433247 Method and circuit for reading fuse cells in a nonvolatile memory during power-up
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US Patent 7436705 Multiple level cell memory device with single bit per cell, re-mappable memory block
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US Patent 7436711 Semiconductor memory device
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US Patent 7440308 Phase-change random access memory device and method of operating the same
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US Patent 7440311 Single-poly non-volatile memory cell
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US Patent 7440313 Two-port SRAM having improved write operation
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US Patent 7440326 Programming non-volatile memory with improved boosting
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US Patent 7440335 Contention-free hierarchical bit line in embedded memory and method thereof
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US Patent 7440342 Unified voltage generation method with improved power efficiency
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US Patent 7440351 Wide window clock scheme for loading output FIFO registers
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US Patent 7440352 Semiconductor memory device capable of selectively refreshing word lines
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US Patent 7440353 Floating body control in SOI DRAM
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US Patent 7440354 Memory with level shifting word line driver and method thereof
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US Patent 7440355 Semiconductor memory device
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US Patent 7443712 Memory erase management system
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US Patent 7443734 Semiconductor memory device with a voltage generating circuit which generates a plurality of voltages using a small number of items of data
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US Patent 7443740 Integrated semiconductor memory with adjustable internal voltage
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US Patent 7443752 Semiconductor memory device amplifying data
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US Patent 7443762 Synchronization circuit for a write operation on a semiconductor memory
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US Patent 7447064 System and method for providing a CMOS compatible single poly EEPROM with an NMOS program transistor
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US Patent 7447078 Method for non-volatile memory with background data latch caching during read operations
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US Patent 7447088 Semiconductor memory device having an open bit line structure, and method of testing the same
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US Patent 7447093 Method for controlling voltage in non-volatile memory systems
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US Patent 7450452 Method to identify or screen VMIN drift on memory cells during burn-in or operation
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US Patent 7453722 Phase change memory device and memory cell array thereof
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US Patent 7453727 Nonvolatile semiconductor memory and method for setting replacement information in nonvolatile semiconductor memory
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US Patent 7453735 Non-volatile memory and control with improved partial page program capability
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US Patent 7453742 Semiconductor integrated circuit device
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US Patent 7453745 Semiconductor memory device and latency signal generating method thereof
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US Patent 7453754 Semiconductor memory device changing refresh interval depending on temperature
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US Patent 7457144 Memory device and method for verifying information stored in memory cells
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US Patent 7457147 Two terminal memory array having reference cells
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US Patent 7457148 Compact and highly efficient DRAM cell
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US Patent 7457173 Area efficient differential EEPROM cell with improved data retention and read/write endurance
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US Patent 7460398 Programming a memory with varying bits per cell
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US Patent 7460429 Circuit and method for reducing power in a memory device during standby modes
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US Patent 7463504 Active float for the dummy bit lines in FeRAM
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US Patent 7463514 Multi-level cell serial-parallel sense scheme for non-volatile flash memory
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US Patent 7463533 Nonvolatile semiconductor storage device
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US Patent 7463537 Global bit select circuit interface with dual read and write bit line pairs
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US Patent 7466587 Non-volatile memory device and method of programming a multi level cell in the same
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US Patent 7466588 Method for improving programming speed in memory devices
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US Patent 7466602 Method and apparatus for filtering output data
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US Patent 7466611 Selection method of bit line redundancy repair and apparatus performing the same
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US Patent 7468910 Method for accessing a memory
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US Patent 7471549 Semiconductor memory device
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US Patent 7471556 Local bank write buffers for accelerating a phase-change memory
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US Patent 7471575 Non-volatile memory and method with shared processing for an aggregate of read/write circuits
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US Patent 7471580 Flip-flop with additional state storage in the event of turn-off
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US Patent 7471590 Write control circuitry and method for a memory array configured with multiple memory subarrays
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US Patent 7474567 Method for programming multi-level nitride read-only memory cells
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US Patent 7474588 Data output circuits for an integrated circuit memory device in which data is output responsive to selective invocation of a plurality of clock signals, and methods of operating the same
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US Patent 7477537 Semiconductor integrated circuit device
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US Patent 7480177 Page buffer and multi-state nonvolatile memory device including the same
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US Patent 7480179 System that compensates for coupling during programming
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US Patent 7483288 Memory device
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US Patent 7483290 Nonvolatile memory utilizing hot-carrier effect with data reversal function
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US Patent 7486557 Methods/circuits for programming flash memory devices using overlapping bit line setup and word line enable intervals
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US Patent 7489540 Bitcell with variable-conductance transfer gate and method thereof
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US Patent 7489547 Method of NAND flash memory cell array with adaptive memory state partitioning
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US Patent 7489548 NAND flash memory cell array with adaptive memory state partitioning
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US Patent 7489582 Low overhead switched header power savings apparatus
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US Patent 7492623 Option circuits and option methods of semiconductor chips
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US Patent 7492631 Methods involving resetting spin-torque magnetic random access memory
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US Patent 7492639 EEPROM memory having an improved resistance to the breakdown of transistors
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US Patent 7495944 Reading phase change memories
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US Patent 7495958 Program and erase methods and structures for byte-alterable flash memory
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US Patent 7495981 Internal voltage generator
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US Patent 7495983 Semiconductor memory device having bit line equalizer in cell array
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US Patent 7499320 Non-volatile memory with cache page copy
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US Patent 7499324 Non-volatile memory and method with control gate compensation for source line bias errors
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US Patent 7499328 Electrically writable non-volatile memory
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US Patent 7499329 Flash memory array using adjacent bit line as source
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US Patent 7499335 Non-volatile memory with improved erasing operation
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US Patent 7499357 Semiconductor memory device
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US Patent 7499361 Dynamic random access memory device and method for self-refreshing memory cells with temperature compensated self-refresh
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US Patent 7499362 Techniques for storing accurate operating current values
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US Patent 7502255 Method for cache page copy in a non-volatile memory
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US Patent 7502264 On-chip EE-PROM programming waveform generation
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US Patent 7502275 Semiconductor memory device
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US Patent 7505313 Program method of flash memory capable of compensating reduction of read margin between states due to hot temperature stress
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US Patent 7505323 Programming memory devices
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US Patent 7505329 Data line disturbance free memory block divided flash memory and microcomputer having flash memory therein
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US Patent 7505333 High voltage detecting circuit for semiconductor memory device and method of controlling the same
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US Patent 7505338 Memory systems and memory cards that use a bad block due to a programming failure therein in single level cell mode and methods of operating the same
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US Patent 7505339 Static semiconductor memory device allowing simultaneous writing of data into a plurality of memory cells
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US Patent 7508692 Semiconductor memory device and semiconductor device group
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US Patent 7508693 One-time-programmable (OTP) memory device and method for testing the same
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US Patent 7508695 Nonvolatile semiconductor memory device and data writing method
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US Patent 7508709 Page buffer circuit with reduced size and methods for reading and programming data with the same
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US Patent 7508718 Method for operating a non-volatile charge-trapping memory device and method for determining programming/erase conditions
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US Patent 7508722 Memory device having strobe terminals with multiple functions
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US Patent 7511982 High speed OTP sensing scheme
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US Patent 7511989 Memory cells in double-gate CMOS technology provided with transistors with two independent gates
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US Patent 7511990 Magnetic tunnel junction temperature sensors
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US Patent 7511999 MIS-transistor-based nonvolatile memory with reliable data retention capability
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US Patent 7512019 High speed digital signal input buffer and method using pulsed positive feedback
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US Patent 7512027 Refresh control circuit in semiconductor memory apparatus and method of controlling period of refresh signal using the same
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US Patent 7512030 Memory with low power mode for WRITE
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US Patent 7515449 CAM asynchronous search-line switching
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US Patent 7515451 Memory apparatus with a bus architecture
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US Patent 7515455 High density memory array for low power application
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US Patent 7515457 Current driven memory cells having enhanced current and enhanced current symmetry
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US Patent 7515473 Semiconductor memory device
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US Patent 7515478 CMOS logic compatible non-volatile memory cell structure, operation, and array configuration
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US Patent 7515491 Method for evaluating leakage effects on static memory cell access time
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US Patent 7515502 Memory array peripheral structures and use
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US Patent 7515504 Phase controlled high speed interfaces
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US Patent 11189330 Open page biasing techniques
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US Patent 11189337 Multi-stage voltage control for peak and average current reduction of open blocks
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US Patent 7518934 Phase change memory with program/verify function
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US Patent 7518941 Methods and apparatus to provide refresh for local out of range read requests to a memory device
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US Patent 7518945 Page buffer circuit of flash memory device
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US Patent 7518946 Memory control device
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US Patent 7522461 Memory device architecture and method for improved bitline pre-charge and wordline timing
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US Patent 7522463 Sense amplifier with stages to reduce capacitance mismatch in current mirror load
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US Patent 7525839 Semiconductor memory device capable of correcting a read level properly
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US Patent 7525841 Programming method for NAND flash
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US Patent 7525854 Memory output circuit and method thereof
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US Patent 7525864 Memory data inversion architecture for minimizing power consumption
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US Patent 7525871 Semiconductor integrated circuit
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US Patent 7529130 Semiconductor memory device
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US Patent 7529141 Asynchronous, high-bandwidth memory component using calibrated timing elements
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US Patent 7529146 Semiconductor device
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US Patent 7532496 System and method for providing a low voltage low power EPROM based on gate oxide breakdown
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US Patent 7532498 Memory device, circuits and methods for reading a memory device
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US Patent 7532501 Semiconductor device including back-gated transistors and method of fabricating the device
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US Patent 7532506 Integrated circuit, cell arrangement, method of operating an integrated circuit, memory module
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US Patent 7532514 Non-volatile memory and method with bit line to bit line coupled compensation
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US Patent 7532515 Voltage reference generator using big flash cell
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US Patent 7532518 Compensation method to achieve uniform programming speed of flash memory devices
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US Patent 7532521 NOR-NAND flash memory device with interleaved mat access
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US Patent 7532525 Semiconductor memory device for decreasing the total number of data transfer lines
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US Patent 7535743 SRAM memory cell protected against current or voltage spikes
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US Patent 7535752 Semiconductor static random access memory device
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US Patent 7535758 One or multiple-times programmable device
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US Patent 7535763 Controlled boosting in non-volatile memory soft programming
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US Patent 7535766 Systems for partitioned soft programming in non-volatile memory
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US Patent 7535771 Devices and methods to improve erase uniformity and to screen for marginal cells for NROM memories
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US Patent 7535772 Configurable data path architecture and clocking scheme
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US Patent 7535773 Data output buffer whose mode switches according to operation frequency and semiconductor memory device having the same
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US Patent 7535785 Semiconductor memory apparatus having plurality of sense amplifier arrays having different activation timing
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US Patent 7535787 Methods and apparatuses for refreshing non-volatile memory
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US Patent 7539030 Attribute cache memory
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US Patent 7539047 MRAM cell with multiple storage elements
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US Patent 7539066 Method, apparatus, and system for improved erase operation in flash memory
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US Patent 7542319 Chalcogenide glass constant current device, and its method of fabrication and operation
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US Patent 7542346 Memory device and method for operating the same
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US Patent 7542356 Semiconductor memory device and method for reducing cell activation during write operations
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US Patent 7545676 Well bias circuit in a memory device and method of operating the same
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US Patent 7545677 Nonvolatile memory device and methods of programming and reading the same
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US Patent 7545686 Device for setting up a write current in an MRAM type memory and memory comprising
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US Patent 7545689 Method and apparatus for improving yield in semiconductor devices by guaranteeing health of redundancy information
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US Patent 7545691 Measuring circuit for qualifying a memory located on a semiconductor device
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US Patent 7545692 Circuit and method of testing a fail in a memory device
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US Patent 7545694 Sense amplifier with leakage testing and read debug capability
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US Patent 7548446 Phase change memory device and associated wordline driving circuit
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US Patent 7548449 Magnetic memory device and methods thereof
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US Patent 7548460 Floating-gate semiconductor structures
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US Patent 7554845 EEPROM cell and EEPROM block
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US Patent 7554865 Randomizing current consumption in memory devices
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US Patent 7554868 Semiconductor memory device
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US Patent 7554869 Semiconductor memory device having internal circuits responsive to temperature data and method thereof
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US Patent 7558098 Ferroelectric memory with sub bit-lines connected to each other and to fixed potentials
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US Patent 7558104 Power saving in memory arrays
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US Patent 7558111 Non-volatile memory cell in standard CMOS process
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US Patent 7558112 SRAM cell controlled by flash memory cell
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US Patent 7558135 Semiconductor memory device and test method thereof
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US Patent 7558138 Bypass circuit for memory arrays
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US Patent 7561479 Semiconductor memory device having a develop reference voltage generator for sense amplifiers
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US Patent 7561483 Internally asymmetric method for evaluating static memory cell dynamic stability
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US Patent 7564714 Flash memory device and method of controlling program voltage
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US Patent 7567469 Over driving pulse generator
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US Patent 7567473 Multi-level memory cell utilizing measurement time delay as the characteristic parameter for level definition
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US Patent 7570514 Method of operating multi-level cell and integrate circuit for using multi-level cell to store data
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US Patent 7573736 Spin torque transfer MRAM device
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US Patent 7573748 Column leakage compensation in a sensing circuit
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US Patent 7577023 Memory including write circuit for providing multiple reset pulses
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US Patent 7577037 Use of data latches in cache operations of non-volatile memories
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US Patent 7577042 Method of programming multi-level semiconductor memory device and multi-level semiconductor memory device
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US Patent 7580275 Control of a memory matrix with resistance hysteresis elements
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US Patent 7583540 Flash memory device and method of programming the same
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US Patent 7583549 Memory output circuit and method thereof
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US Patent 7586785 Non-volatile semiconductor memory device
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US Patent 7586805 Method and system for providing directed bank refresh for volatile memories
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US Patent 7589995 One-transistor memory cell with bias gate
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US Patent 7590002 Resistance sensing and compensation for non-volatile storage
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US Patent 7590006 Semiconductor memory device
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US Patent 7593269 Differential flash memory programming technique
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US Patent 7593271 Memory device including multiplexed inputs
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US Patent 7596016 Optically accessible phase change memory
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US Patent 7596023 Memory device employing three-level cells and related methods of managing
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US Patent 7599205 Methods and apparatus of stacking DRAMs
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US Patent 7599212 Method and apparatus for high-efficiency operation of a dynamic random access memory
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US Patent 7599228 Flash memory device having increased over-erase correction efficiency and robustness against device variations
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US Patent 7599238 Semiconductor memory device and driving method thereof
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US Patent 7602631 Multi-level memory cell utilizing measurement time delay as the characteristic parameter for level definition
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US Patent 7602632 Multi-level memory cell utilizing measurement time delay as the characteristic parameter for level definition
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US Patent 7602646 Threshold evaluation of EPROM cells
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US Patent 7606111 Synchronous page-mode phase-change memory with ECC and RAM cache
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US Patent 7609552 Non-volatile memory with background data latch caching during erase operations
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US Patent 7613031 System, apparatus, and method to increase read and write stability of scaled SRAM memory cells
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US Patent 7616474 Offset compensated sensing for magnetic random access memory
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US Patent 7616487 Decoders and decoding methods for nonvolatile semiconductor memory devices
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US Patent 7616491 Semiconductor memory device improved in data writing
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US Patent 7616518 Multi-port memory device with serial input/output interface
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US Patent 7616521 Semiconductor memory device selectively enabling address buffer according to data output
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US Patent 7619922 Method for non-volatile memory with background data latch caching during erase operations
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US Patent 7623384 Nonvolatile semiconductor memory
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US Patent 7623399 Semiconductor memory for relieving a defective bit
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US Patent 7626853 Method of operating memory cell providing internal power switching
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US Patent 7626867 Method for accessing memory by way of step-increasing threshold voltage
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US Patent 7630268 Dynamic semiconductor memory reducing the frequency of occurrence of refresh command request and refresh control method thereof
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US Patent 7646624 Method of selecting operating characteristics of a resistive memory device
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US Patent 7646668 Maintaining dynamic count of FIFO contents in multiple clock domains
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US Patent 7649764 Memory with shared write bit line(s)
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US Patent 7649765 Magnetic memory cell and method of fabricating same
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US Patent 7649776 Nonvolatile semiconductor memory system
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US Patent 7652946 Semiconductor device
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US Patent 7656733 Semiconductor memory device
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US Patent 7660152 Method and apparatus for implementing self-referencing read operation for PCRAM devices
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US Patent 7663915 Nonvolatile memory
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US Patent 7663925 Method and apparatus for programming flash memory
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US Patent 7663952 Capacitor supported precharging of memory digit lines
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US Patent 7663954 Semiconductor memory device including a sense amplifier having a reduced operating current
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US Patent 7668012 Memory cell programming
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US Patent 7672187 Elastic power for read and write margins
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US Patent 7675774 Page buffer and multi-state nonvolatile memory device including the same
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US Patent 7675804 Semiconductor integrated circuit device and semiconductor device including plurality of semiconductor circuits
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US Patent 7679948 Write and read assist circuit for SRAM with power recycling
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US Patent 7679960 Non-volatile memory device and method of operating the same
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US Patent 7679970 Semiconductor memory device for simultaneously performing read access and write access
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US Patent 7684276 Techniques for configuring memory systems using accurate operating parameters
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US Patent 7688622 Phase change memory device with dummy cell array
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US Patent 7688630 Programming memory devices
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US Patent 7692980 Method of and apparatus for reading data
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US Patent 7692994 Dynamic random access memory device and method for self-refreshing memory cells with temperature compensated self-refresh
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US Patent 7692998 Circuit of detecting power-up and power-down
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US Patent 7697351 Circuit and method for controlling internal voltage of semiconductor memory apparatus
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US Patent 7697354 Integrated circuit memory device responsive to word line/bit line short-circuit
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US Patent 7706170 Compact and highly efficient DRAM cell
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US Patent 7706189 Non-volatile storage system with transitional voltage during programming
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US Patent 7706207 Memory with level shifting word line driver and method thereof
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US Patent 7710761 CMOS SRAM/ROM unified bit cell
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US Patent 7715223 Semiconductor integrated circuit device
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US Patent 7715241 Method for erasing a P-channel non-volatile memory
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US Patent 7719896 Configurable single bit/dual bits memory
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US Patent 7719914 Semiconductor memory and test system
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US Patent 7724572 Integrated circuit having a non-volatile memory cell transistor as a fuse device
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US Patent 7724582 Decoders and decoding methods for nonvolatile memory devices using level shifting
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US Patent 7729167 Programming a memory with varying bits per cell
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US Patent 7729192 Circuit and method for reducing power in a memory device during standby modes
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US Patent 7733703 Method for non-volatile memory with background data latch caching during read operations
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US Patent 7733733 Device for writing data into memory and method thereof
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US Patent 7738276 Semiconductor device and method for manufacturing
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US Patent 7738283 Design structure for SRAM active write assist for improved operational margins
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US Patent 7738312 Semiconductor memory device
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US Patent 7742335 Non-volatile multilevel memory cells
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US Patent 7742342 Biasing circuit for EEPROM memories with shared latches
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US Patent 7742343 Metal oxide semiconductor device and method for operating an array structure comprising the same devices
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US Patent 7746678 Amplifier circuit and associative memory
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US Patent 7746688 PRAM and method of firing memory cells
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US Patent 7746696 CMOS twin cell non-volatile random access memory
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US Patent 7751244 Applying adaptive body bias to non-volatile storage based on number of programming cycles
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US Patent 7751246 Charge loss compensation during programming of a memory device
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US Patent 7755925 Static random access memory
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US Patent 7755928 Semiconductor memory device and semiconductor device group
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US Patent 7760538 Non-volatile SRAM cell
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US Patent 7764532 High speed OTP sensing scheme
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US Patent 7764542 Method for programming a semiconductor memory device
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US Patent 7764552 Semiconductor integrated circuit
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US Patent 7768821 Non-volatile SRAM memory cell equipped with mobile gate transistors and piezoelectric operation
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US Patent 7768830 Semiconductor memory device capable of correcting a read level properly
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US Patent 7768850 System for bitcell and column testing in SRAM
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US Patent 7773408 Nonvolatile memory device
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US Patent 7773437 Design structure for improved memory column redundancy scheme
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US Patent 7773453 FIFO peek access
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US Patent 7782645 Selective encoding of data values for memory cell blocks
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US Patent 7782646 High density content addressable memory using phase change devices
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US Patent 7782651 Semiconductor device including storage device and method for driving the same
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US Patent 7782665 Method of managing a memory device employing three-level cells
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US Patent 7782674 Sensing of memory cells in NAND flash
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US Patent 7782687 Semiconductor device
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US Patent 7782695 Compensated current offset in a sensing circuit
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US Patent 7782699 Auto-refresh controlling apparatus
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US Patent 7791923 Multi-state resistive memory element, multi-bit resistive memory cell, operating method thereof, and data processing system using the memory element
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US Patent 7791964 Memory system and method ensuring read data stability
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US Patent 7791977 Design structure for low overhead switched header power savings apparatus
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US Patent 7796424 Memory device having drift compensated read operation and associated method
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US Patent 7796437 Voltage regulator with reduced sensitivity of output voltage to change in load current
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US Patent 7796450 Radio frequency (RFID) tag including configurable single bit/dual bits memory
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US Patent 7804715 Bitcell current sense device and method thereof
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US Patent 7804734 Data strobe buffer and memory system including the same
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US Patent 7808804 Power line layout
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US Patent 7808826 Non-volatile storage with individually controllable shield plates between storage elements
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US Patent 7808832 Non-volatile memory and method with improved sensing having a bit-line lockout control
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US Patent 7808834 Incremental memory refresh
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US Patent 7808844 Methods and apparatus for improved memory access
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US Patent 7813167 Memory cell
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US Patent 7813171 Semiconductor memory device
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US Patent 7813214 Semiconductor memory device
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US Patent 7813217 Semiconductor memory device and method for operating the same
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US Patent 7817457 Non-volatile memory device
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US Patent RE41880 Semiconductor memory device
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US Patent 7821823 Semiconductor memory device, method of driving the same and method of manufacturing the same
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US Patent 7821825 NAND flash memory devices having shielding lines between wordlines and selection lines
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US Patent 7821859 Adaptive current sense amplifier with direct array access capability
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US Patent 7826274 Non-volatile memory cell read failure reduction
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US Patent 7826276 Non-volatile memory device reducing data programming and verification time, and method of driving the same
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US Patent 7826280 Integrated circuit and method for reading the content of a memory cell
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US Patent 7826303 Data output circuit having shared data output control unit
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US Patent 7826304 Simplified power-down mode control circuit utilizing active mode operation control signals
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US Patent 7830735 Asynchronous, high-bandwidth memory component using calibrated timing elements
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US Patent 7835168 Asymmetric dipolar ring
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US Patent 7835213 Semiconductor memory device
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US Patent 7839689 Power supplies in flash memory devices and systems
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US Patent 7839704 Memory circuit and control method thereof
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US Patent 7839713 Reading and writing data to a memory cell in one clock cycle
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US Patent 7839715 SerDes double rate bitline with interlock to block precharge capture
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US Patent 7843732 Methods of operating multi-bit flash memory devices and related systems
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US Patent 7843742 Method of controlling memory and memory system thereof
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US Patent 7843752 Circuit and method for controlling refresh periods in semiconductor memory devices
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US Patent 7843760 Interface circuit and method for coupling between a memory device and processing circuitry
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US Patent 7848129 Dynamically partitioned CAM array
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US Patent 7848147 Nonvolatile semiconductor memory device and writing method of the same
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US Patent 7852700 Memory device
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US Patent 7852703 Semiconductor memory device and layout structure of sub-word line control signal generator
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US Patent 7859895 Standalone thin film memory
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US Patent 7859923 Semiconductor memory device
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US Patent 7859938 Semiconductor memory device and test method thereof
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US Patent 7864568 Semiconductor storage device
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US Patent 7864585 Multi level inhibit scheme
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US Patent 7864621 Compiled memory, ASIC chip, and layout method for compiled memory
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US Patent 7869263 Elastic power for read margin
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US Patent 7869294 Semiconductor device having single-ended sensing amplifier
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US Patent 7872934 Semiconductor device and method for writing data into memory
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US Patent 7876615 Method of operating integrated circuit embedded with non-volatile programmable memory having variable coupling related application data
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US Patent 7876617 Apparatus and method for providing power in semiconductor memory device
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US Patent 7876638 Storing operational information in an array of memory cells
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US Patent 7881109 Refresh circuit of semiconductor memory apparatus
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US Patent 7881115 Method of programming nonvolatile memory device
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US Patent 7881123 Multi-operation mode nonvolatile memory
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US Patent 7881127 Nonvolatile memory device and method of testing the same
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US Patent 7881130 Semiconductor memory device having write data through function
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US Patent 7881145 Semiconductor device and semiconductor system having the same
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US Patent 7885091 Limited charge delivery for programming non-volatile storage elements
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US Patent 7885104 Information storage devices using magnetic domain wall movement and methods of operating the same
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US Patent 7885106 Nonvolatile semiconductor memory device and method for driving same
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US Patent 7885134 Refresh controller and refresh controlling method for embedded DRAM
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US Patent 7889563 Memory device and method of controlling read level
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US Patent 7894252 Magnetic memory cell and method of fabricating same
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US Patent 7894281 Redundancy circuit using column addresses
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US Patent 7898834 Semiconductor chip with chip selection structure and stacked semiconductor package having the same
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US Patent 7898839 Semiconductor memory device and method of writing into semiconductor memory device
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US Patent 7903445 Photonic memory device, data storing method using the photonic memory device and photonic sensor device
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US Patent 7903453 Magnetic memory
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US Patent 7903483 Integrated circuit having memory with configurable read/write operations and method therefor
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US Patent 7903490 Semiconductor memory device
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US Patent 7907432 Content addressable memory device for simultaneously searching multiple flows
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US Patent 7907437 Resistance variable memory device and method of writing data
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US Patent 7907450 Methods and apparatus for implementing bit-by-bit erase of a flash memory device
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US Patent 7907451 Semiconductor storage device and method of manufacturing same
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US Patent 7911818 Content addressable memory having bidirectional lines that support passing read/write data and search data
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US Patent 7911832 High speed low power magnetic devices based on current induced spin-momentum transfer
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US Patent 7911843 Non-volatile memory device and program method thereof
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US Patent 7911853 Clock path control circuit and semiconductor memory device using the same
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US Patent 7916510 Reformulating regular expressions into architecture-dependent bit groups
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US Patent 7916517 Circuit arrangement and method for recognizing manipulation attempts
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US Patent 7916528 Predictive thermal preconditioning and timing control for non-volatile memory cells
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US Patent 7916552 Tracking cells for a memory system
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US Patent 7920399 Low power content addressable memory device having selectable cascaded array segments
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US Patent 7920423 Non volatile memory circuit with tailored reliability
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US Patent 7920425 Differential flash memory programming technique
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US Patent 7924590 Compiling regular expressions for programmable content addressable memory devices
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US Patent 7924606 Memory controller and decoder
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US Patent 7924629 Three-dimensional memory device and programming method
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US Patent 7924644 Semiconductor memory device including floating body transistor memory cell array and method of operating the same
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US Patent 7929351 Method for reducing lateral movement of charges and memory device thereof
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US Patent 7929363 Memory test and setup method
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US Patent 7929370 Spin momentum transfer MRAM design
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US Patent 7933153 Method for extracting the distribution of charge stored in a semiconductor device
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US Patent 7933155 Memory device with reduced buffer current during power-down mode
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US Patent 7936579 Semiconductor memory device and semiconductor device group
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US Patent 7936584 Reading phase change memories
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US Patent 7936602 Use of data latches in cache operations of non-volatile memories
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US Patent 7936614 Semiconductor memory device and driving method thereof
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US Patent 7936627 Magnetoresistance effect element and MRAM
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US Patent 7936638 Enhanced programmable pulsewidth modulating circuit for array clock generation
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US Patent 7940568 Dynamic polarization for reducing stress induced leakage current
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US Patent 7940569 Power off apparatus, systems, and methods
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US Patent 7940584 Method for inspecting the electrical performance of a flash memory cell
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US Patent 7940591 Methods and apparatuses for controlling fully-buffered dual inline memory modules
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US Patent 7944725 Semiconductor memory and method for operating a semiconductor memory
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US Patent 7944736 Magnetoresistive device
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US Patent 7944738 Spin torque transfer cell structure utilizing field-induced antiferromagnetic or ferromagnetic coupling
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US Patent 7944743 Methods of making a semiconductor memory device
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US Patent 7944750 Multi-programmable non-volatile memory cell
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US Patent 7944751 Method for programming of memory cells, in particular of the flash type, and corresponding programming architecture
‌
US Patent 7944761 Memory device having strobe terminals with multiple functions
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US Patent 7944764 Writing to non-volatile memory during a volatile memory refresh cycle
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US Patent 7948783 MRAM
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US Patent 7948785 Semiconductor devices having sense amplifiers and electronic systems employing the same
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US Patent 7948816 Accessing data within a memory formed of memory banks
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US Patent 7948817 Advanced memory device having reduced power and improved performance
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US Patent 7952912 Static random access memory cell and devices using same
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US Patent 7952931 Nonvolatile semiconductor memory device which realizes “1” write operation by boosting channel potential
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US Patent 7952935 Nonvolatile memory device and program or verification method using the same
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US Patent 7952937 Wordline driver for a non-volatile memory device, a non-volatile memory device and method
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US Patent 7952945 Method and apparatus for determining write leveling delay for memory interfaces
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US Patent 7952950 Semiconductor device including anti-fuse circuit, and method of writing address to anti-fuse circuit
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US Patent 7952957 Circuit for generating read and signal and circuit for generating internal clock using the same
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US Patent 7952958 Non-volatile semiconductor storage system
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US Patent 7957177 Static random-access memory with boosted voltages
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US Patent 7957182 Memory cell having nonmagnetic filament contact and methods of operating and fabricating the same
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US Patent 7957191 Method of programming non-volatile memory device
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US Patent 7957201 Flash memory device operating at multiple speeds
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US Patent 7957210 Variable delay circuit, memory control circuit, delay amount setting apparatus, delay amount setting method and computer-readable recording medium in which delay amount setting program is recorded
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US Patent 7957213 Semiconductor memory apparatus
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US Patent 7961489 Comparing data representations to stored patterns
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US Patent 7961492 Charge storage circuit, voltage stabilizer circuit, method for storing charge using the same
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US Patent 7961495 Programmable resistance memory with feedback control
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US Patent 7961499 Low leakage high performance static random access memory cell using dual-technology transistors
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US Patent 7961514 Semiconductor device, a method of using a semiconductor device, a programmable memory device, and method of producing a semiconductor device
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US Patent 7961524 Method for driving a nonvolatile semiconductor memory device
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US Patent 7961527 Buffering systems for accessing multiple layers of memory in integrated circuits
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US Patent 7961542 Methods, circuits, and systems to select memory regions
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US Patent 7961547 Memory device using a common write word line and a common read bit line
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US Patent 7965546 Synchronous page-mode phase-change memory with ECC and RAM cache
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US Patent 7965553 Method of verifying a program operation in a non-volatile memory device
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US Patent 7965563 Data line disturbance free memory block divided flash memory and microcomputer having flash memory therein
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US Patent 7965569 Semiconductor storage device
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US Patent 7969760 Semiconductor memory device and manufacturing method of the same
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US Patent 7969768 Magnetic random access memory
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US Patent 7969776 Data cells with drivers and methods of making and operating the same
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US Patent 7969789 Method for driving nonvolatile semiconductor memory device
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US Patent 7969816 Memory device
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US Patent 7974126 Semiconductor memory device including write selectors
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US Patent 7974129 Method and apparatus for programming flash memory
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US Patent 7974132 Shifting reference values to account for voltage sag
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US Patent 7978521 Memory device and method of programming thereof
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US Patent 7978527 Verification process for non-volatile storage
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US Patent 7983075 Nonvolatile memory device
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US Patent 7983083 Semiconductor device
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US Patent 7983097 Wordline driving circuit of semiconductor memory device
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US Patent 7983107 Flash backed DRAM module with a selectable number of flash chips
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US Patent 7990797 State of health monitored flash backed dram module
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US Patent 7995395 Charge loss compensation during programming of a memory device
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US Patent 7995406 Data writing apparatus and method for semiconductor integrated circuit
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US Patent 7995407 Semiconductor memory device and control method thereof
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US Patent 8000125 Method of programming multi-layer chalcogenide devices
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US Patent 8000140 Random access memory with CMOS-compatible nonvolatile storage element
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US Patent 8000146 Applying different body bias to different substrate portions for non-volatile storage
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US Patent 8004900 Controlling select gate voltage during erase to improve endurance in non-volatile memory
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US Patent 8009469 Multiple level cell memory device with single bit per cell, re-mappable memory block
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US Patent 8009480 Nonvolatile semiconductor memory system
Edits on 8 Dec, 2021
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Golden AI
edited on 8 Dec, 2021
Edits made to:
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Infobox
Patent primary examiner of
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US Patent 8009480 Nonvolatile semiconductor memory system
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 8004900 Controlling select gate voltage during erase to improve endurance in non-volatile memory

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