Log in
Sign up
Golden has been acquired by ComplyAdvantage.Read about it here ⟶
‌

Michael S. Lebentritt

OverviewStructured DataIssuesContributorsActivity

All edits

Edits on 20 Aug, 2022
"Edit from table cell"
Ruslan Goriunov profile picture
Ruslan Goriunov
edited on 20 Aug, 2022
Edits made to:
Infobox (+1 properties)
Infobox
Facebook URL
https://www.facebook.com/officialmichaelfranks/
Edits on 14 Dec, 2021
"Remove inverse infobox"
Golden AI profile picture
Golden AI
edited on 14 Dec, 2021
Edits made to:
Infobox (-536 properties)
Infobox
Patent primary examiner of
‌
US Patent 7226852 Preventing damage to low-k materials during resist stripping
‌
US Patent 7235457 High permeability layered films to reduce noise in high speed interconnects
‌
US Patent 7344947 Methods of performance improvement of HVMOS devices
‌
US Patent 7348194 Electrode compositions containing carbon nanotubes for solid electrolyte capacitors
‌
US Patent 7358177 Fabrication method of under bump metallurgy structure
‌
US Patent 7358182 Method of forming an interconnect structure
‌
US Patent 7361524 Method of manufacturing floating structure
‌
US Patent 7364972 Semiconductor device
‌
US Patent 7364976 Selective etch for patterning a semiconductor film deposited non-selectively
‌
US Patent 7364980 Manufacturing method of semiconductor substrate
‌
US Patent 7374586 Solid electrolytic capacitor, fabrication method thereof, and coupling agent utilizing in the same
‌
US Patent 7374980 Field effect transistor with thin gate electrode and method of fabricating same
‌
US Patent 7374998 Selective incorporation of charge for transistor channels
‌
US Patent 7375000 Discrete on-chip SOI resistors
‌
US Patent 7375017 Method for fabricating semiconductor device having stacked-gate structure
‌
US Patent 7377947 Electrolyte capacitors having a polymeric outer layer and process for their production
‌
US Patent 7378312 Recess gate transistor structure for use in semiconductor device and method thereof
‌
US Patent 7381596 Method of manufacturing an AMOLED
‌
US Patent 7381612 Method for manufacturing semiconductor device with recess channels and asymmetrical junctions
‌
US Patent 7381620 Oxygen elimination for device processing
‌
US Patent 7381622 Method for forming embedded strained drain/source regions based on a combined spacer and cavity etch process
‌
US Patent 7381623 Pre-epitaxial disposable spacer integration scheme with very low temperature selective epitaxy for enhanced device performance
‌
US Patent 7381634 Integrated circuit system for bonding
‌
US Patent 7381646 Method for using a Cu BEOL process to fabricate an integrated circuit (IC) originally having an al design
‌
US Patent 7384808 Fabrication method of high-brightness light emitting diode having reflective layer
‌
US Patent 7384846 Method of fabricating semiconductor device
‌
US Patent 7384852 Sub-lithographic gate length transistor using self-assembling polymers
‌
US Patent 7384874 Method of forming hardmask pattern of semiconductor device
‌
US Patent 7384875 Method of manufacturing semiconductor device using flexible tube
‌
US Patent 7384878 Method for applying a layer to a hydrophobic surface
‌
US Patent 7385287 Preventing damage to low-k materials during resist stripping
‌
US Patent 7387648 Solid electrolytic capacitor and manufacturing method thereof
‌
US Patent 7387928 Device and method for making air, gas or vacuum capacitors and other microwave components
‌
US Patent 7387929 Capacitor in semiconductor device and method of manufacturing the same
‌
US Patent 7387931 Semiconductor memory device with vertical channel transistor and method of fabricating the same
‌
US Patent 7387953 Laminated layer structure and method for forming the same
‌
US Patent 7387955 Field effect transistor and method for manufacturing the same
‌
US Patent 7390680 Method to selectively identify reliability risk die based on characteristics of local regions on the wafer
‌
US Patent 7390697 Enhanced adhesion strength between mold resin and polyimide
‌
US Patent 7390702 Method for manufacturing semiconductor device
‌
US Patent 7390711 MOS transistor and manufacturing method thereof
‌
US Patent 7390717 Trench power MOSFET fabrication using inside/outside spacers
‌
US Patent 7390719 Method of manufacturing a semiconductor device having a dual gate structure
‌
US Patent 7390722 System and method for using an oxidation process to create a stepper alignment structure on semiconductor wafers
‌
US Patent 7390744 Method and composition for polishing a substrate
‌
US Patent 7391111 Systems and methods for maintaining performance at a reduced power
‌
US Patent 7393721 Semiconductor chip with metallization levels, and a method for formation in interconnect structures
‌
US Patent 7393732 Double silicon-on-insulator (SOI) metal oxide semiconductor field effect transistor (MOSFET) structures
‌
US Patent 7393742 Semiconductor device having a capacitor and a fabrication method thereof
‌
US Patent 7393750 Method for manufacturing a semiconductor device
‌
US Patent 7393764 Laser treatment apparatus, laser treatment method, and manufacturing method of semiconductor device
‌
US Patent 7393766 Process for integration of a high dielectric constant gate insulator layer in a CMOS device
‌
US Patent 7393773 Method and apparatus for producing co-planar bonding pads on a substrate
‌
US Patent 7393783 Methods of forming metal-containing structures
‌
US Patent 7396693 Multiple point gate oxide integrity test method and system for the manufacture of semiconductor integrated circuits
‌
US Patent 7396723 Method of manufacturing EEPROM device
‌
US Patent 7396727 Transistor of semiconductor device and method for fabricating the same
‌
US Patent 7396729 Methods of forming semiconductor devices having a trench with beveled corners
‌
US Patent 7396735 Semiconductor element heat dissipating member, semiconductor device using same, and method for manufacturing same
‌
US Patent 7396749 Method for contacting parts of a component integrated into a semiconductor substrate
‌
US Patent 7396751 Method for manufacturing semiconductor device
‌
US Patent 7396761 Semiconductor device and method of manufacturing the same
‌
US Patent 7396776 Semiconductor-on-insulator (SOI) structures including gradient nitrided buried oxide (BOX)
‌
US Patent 7399647 Multi beam scanning with bright/dark field imaging
‌
US Patent 7399653 Nitride optoelectronic devices with backside deposition
‌
US Patent 7399679 Narrow width effect improvement with photoresist plug process and STI corner ion implantation
‌
US Patent 7399692 III-nitride semiconductor fabrication
‌
US Patent 7399706 Manufacturing method of semiconductor device
‌
US Patent 7400391 System and method for detection of spatial signature yield loss
‌
US Patent 7402484 Methods for forming a field effect transistor
‌
US Patent 7402486 Cylinder-type capacitor and storage device, and method(s) for fabricating the same
‌
US Patent 7402492 Method of manufacturing a memory device having improved erasing characteristics
‌
US Patent 7402494 Method for fabricating high voltage semiconductor device
‌
US Patent 7402501 Method of manufacturing a coaxial trace in a surrounding material, coaxial trace formed thereby, and semiconducting material containing same
‌
US Patent 7402534 Pretreatment processes within a batch ALD reactor
‌
US Patent 7405122 Methods for fabricating a capacitor
‌
US Patent 7405127 Method for producing a vertical field effect transistor
‌
US Patent 7405131 Method and structure to prevent silicide strapping of source/drain to body in semiconductor devices with source/drain stressor
‌
US Patent 7405153 Method for direct electroplating of copper onto a non-copper plateable layer
‌
US Patent 7405156 Method of forming wiring pattern
‌
US Patent 7405158 Methods for depositing tungsten layers employing atomic layer deposition techniques
‌
US Patent 7407520 Method of making a multi-electrode double layer capacitor having hermetic electrolyte seal
‌
US Patent 7407823 Manufacturing method of semiconductor integrated circuit device
‌
US Patent 7407825 Optical microsystem and method for making same
‌
US Patent 7407838 Method of manufacturing a semiconductor method of manufacturing a thin-film transistor and thin-film transistor
‌
US Patent 7407859 Compound semiconductor device and its manufacture
‌
US Patent 7407881 Semiconductor device and method for manufacturing the same
‌
US Patent 7407888 Semiconductor device and a fabrication process thereof
‌
US Patent 7407892 Deposition methods
‌
US Patent 7407895 Process for producing dielectric insulating thin film, and dielectric insulating material
‌
US Patent 7410510 Process of producing activated carbon for electrode of electric double layer capacitor
‌
US Patent 7410813 Method of parallel lapping a semiconductor die
‌
US Patent 7410815 Apparatus and method for non-contact assessment of a constituent in semiconductor substrates
‌
US Patent 7410839 Thin film transistor and manufacturing method thereof
‌
US Patent 7410868 Method for fabricating a nonvolatile memory element and a nonvolatile memory element
‌
US Patent 7410881 Method of manufacturing flash memory device
‌
US Patent 7413960 Method of forming floating gate electrode in flash memory device
‌
US Patent 7413963 Method of edge bevel rinse
‌
US Patent 7413971 Method of producing a layered arrangement and layered arrangement
‌
US Patent 7416907 Semiconductor device and method for forming the same
‌
US Patent 7416973 Method of increasing the etch selectivity in a contact structure of semiconductor devices
‌
US Patent 7416992 Method of patterning a low-k dielectric using a hard mask
‌
US Patent 7416995 Method for fabricating controlled stress silicon nitride films
‌
US Patent 7419847 Method for forming metal interconnection of semiconductor device
‌
US Patent 7419870 Method of manufacturing a flash memory device
‌
US Patent 7422970 Method for modifying circuit within substrate
‌
US Patent 7422975 Composite inter-level dielectric structure for an integrated circuit
‌
US Patent 7427545 Trench memory cells with buried isolation collars, and methods of fabricating same
‌
US Patent 7427561 Method for manufacturing semiconductor device
‌
US Patent 7427569 Metal etching process and rework method thereof
‌
US Patent 7432141 Large-grain p-doped polysilicon films for use in thin film transistors
‌
US Patent 7432148 Shallow trench isolation by atomic-level silicon reconstruction
‌
US Patent 7432167 Method of fabricating a strained silicon channel metal oxide semiconductor transistor
‌
US Patent 7432184 Integrated PVD system using designated PVD chambers
‌
US Patent 7432189 Device with self aligned gaps for capacitance reduction
‌
US Patent 7432204 Wafer and the manufacturing and reclaiming methods thereof
‌
US Patent 7435628 Method of forming a vertical MOS transistor
‌
US Patent 7435654 Analog capacitor having at least three high-k dielectric layers, and method of fabricating the same
‌
US Patent 7435663 Methods for dicing a released CMOS-MEMS multi-project wafer
‌
US Patent 7435678 Method of depositing noble metal electrode using oxidation-reduction reaction
‌
US Patent 7436075 Ion beam irradiation apparatus and ion beam irradiation method
‌
US Patent 7439107 Laser irradiation apparatus, method of irradiating laser light, and method of manufacturing a semiconductor device
‌
US Patent 7439135 Self-aligned body contact for a semiconductor-on-insulator trench device and method of fabricating same
‌
US Patent 7439145 Tunable semiconductor diodes
‌
US Patent 7439154 Method of fabricating interconnect structure
‌
US Patent 7442618 Method to engineer etch profiles in Si substrate for advanced semiconductor devices
‌
US Patent 7442623 Method for manufacturing bonded substrate and bonded substrate manufactured by the method
‌
US Patent 7442627 Transparent conductive layer forming method, transparent conductive layer formed by the method, and material comprising the layer
‌
US Patent 7442633 Decoupling capacitor for high frequency noise immunity
‌
US Patent 7445958 Semiconductor device having a leading wiring layer
‌
US Patent 7446012 Lateral PNP transistor and the method of manufacturing the same
‌
US Patent 7446034 Process for making a metal seed layer
‌
US Patent 7449361 Semiconductor substrate with islands of diamond and resulting devices
‌
US Patent 7449372 Manufacturing method of substrate having conductive layer and manufacturing method of semiconductor device
‌
US Patent 7452785 Method of fabrication of highly heat dissipative substrates
‌
US Patent 7452795 Semiconductor device and method for fabricating the same
‌
US Patent 7452816 Semiconductor processing method and chemical mechanical polishing methods
‌
US Patent 7452825 Method of forming a mask structure and method of forming a minute pattern using the same
‌
US Patent 7456067 Method with high gapfill capability for semiconductor devices
‌
US Patent 7456086 Semiconductor having structure with openings
‌
US Patent 7459373 Method for fabricating and separating semiconductor devices
‌
US Patent 7459375 Transfer method for forming a silicon-on-plastic wafer
‌
US Patent 7459396 Method for thin film deposition using multi-tray film precursor evaporation system
‌
US Patent 7462514 Semiconductor device and method for manufacturing the same, liquid crystal television, and EL television
‌
US Patent 7462518 Silicone metalization
‌
US Patent 7462539 Direct tunneling memory with separated transistor and tunnel areas
‌
US Patent 7465599 Method for manufacturing physical quantity sensor
‌
US Patent 7465606 Resistance welded solder crimp for joining stranded wire to a copper lead-frame
‌
US Patent 7465643 Semiconductor device with fixed channel ions
‌
US Patent 7465652 Method of forming a catalyst layer on the barrier layer of a conductive interconnect of a semiconductor device
‌
US Patent 7468317 Method of forming metal line of semiconductor device
‌
US Patent 7470581 Electromagnetic waveguide
‌
US Patent 7470586 Memory cell having bar-shaped storage node contact plugs and methods of fabricating same
‌
US Patent 7473587 High-quality SGOI by oxidation near the alloy melting temperature
‌
US Patent 7473597 Method of forming via structures and method of fabricating phase change memory devices incorporating such via structures
‌
US Patent 7473607 Method of manufacturing a multi-workfunction gates for a CMOS circuit
‌
US Patent 7473630 Semiconductor device and method for manufacturing same
‌
US Patent 7473634 Method for integrated substrate processing in copper metallization
‌
US Patent 7473644 Method for forming controlled geometry hardmasks including subresolution elements
‌
US Patent 7473999 Semiconductor chip and process for forming the same
‌
US Patent 7476600 FET gate structure and fabrication process
‌
US Patent 7476609 Forming of a cavity in an insulating layer
‌
US Patent 7476610 Removable spacer
‌
US Patent 7476612 Method for manufacturing semiconductor device
‌
US Patent 7479417 Method for manufacturing contact structure of pixel electrode of liquid crystal display device
‌
US Patent 7482199 Self alignment features for an electronic assembly
‌
US Patent 7482251 Etch before grind for semiconductor die singulation
‌
US Patent 7482262 Method of manufacturing semiconductor device
‌
US Patent 7485560 Method for fabricating crystalline silicon thin films
‌
US Patent 7488687 Methods of forming electrical interconnect structures using polymer residues to increase etching selectivity through dielectric layers
‌
US Patent 7491561 Pixel sensor having doped isolation structure sidewall
‌
US Patent 7491562 Light emitting device and manufacturing method thereof
‌
US Patent 7491592 Thin film transistor device with high symmetry
‌
US Patent 7491637 Formation of conductive templates employing indium tin oxide
‌
US Patent 7494844 Method for manufacturing substrate with cavity
‌
US Patent 7498262 Method of fabricating a thin film and metal wiring in a semiconductor device
‌
US Patent 7501299 Method for controlling the structure and surface qualities of a thin film and product produced thereby
‌
US Patent 7501353 Method of formation of a damascene structure utilizing a protective film
‌
US Patent 7504311 Structure and method of integrating compound and elemental semiconductors for high-performance CMOS
‌
US Patent 7504322 Growth of a semiconductor layer structure
‌
US Patent 7504330 Method of forming an insulative film
‌
US Patent 7504333 Method of forming bit line of semiconductor device
‌
US Patent 7507614 Image sensor applied with device isolation technique for reducing dark signals and fabrication method thereof
‌
US Patent 7514273 Method for applying rewiring to a panel while compensating for position errors of semiconductor chips in component positions of the panel
‌
US Patent 7514276 Aligning stacked chips using resistance assistance
‌
US Patent 7514327 Electronically scannable multiplexing device
‌
US Patent 7517753 Methods of forming pluralities of capacitors
‌
US Patent 7517782 Method of forming a metal layer over a patterned dielectric by wet chemical deposition including an electroless and a powered phase
‌
US Patent 7521316 Methods of forming gate structures for semiconductor devices
‌
US Patent 7521801 Semiconductor device
‌
US Patent 7521802 Semiconductor device having a refractory metal containing film and method for manufacturing the same
‌
US Patent 7524697 Method for manufactuing a semiconductor integrated circuit device
‌
US Patent 7524724 Method of forming titanium nitride layer and method of fabricating capacitor using the same
‌
US Patent 7524750 Integrated process modulation (IPM) a novel solution for gapfill with HDP-CVD
‌
US Patent 7527994 Amorphous silicon thin-film transistors and methods of making the same
‌
US Patent 7528059 Method for reducing polish-induced damage in a contact structure by forming a capping layer
‌
US Patent 7528466 Copper gate electrode of liquid crystal display device and method of fabricating the same
‌
US Patent 7531370 Light-emitting diode and its manufacturing method
‌
US Patent 7531374 CMOS image sensor process and structure
‌
US Patent 7531392 Multi-orientation semiconductor-on-insulator (SOI) substrate, and method of fabricating same
‌
US Patent 7531457 Method of fabricating suspended structure
‌
US Patent 7534625 Phase change memory with damascene memory element
‌
US Patent 7534677 Method of fabricating a dual gate oxide
‌
US Patent 7534685 Method for fabrication of a capacitor, and a monolithically integrated circuit comprising such a capacitor
‌
US Patent 7534687 Semiconductor device and method for manufacturing the same
‌
US Patent 7534689 Stress enhanced MOS transistor and methods for its fabrication
‌
US Patent 7534711 System and method for direct etching
‌
US Patent 7537971 Method for fabricating CMOS image sensor
‌
US Patent 7537985 Double gate isolation
‌
US Patent 7537987 Semiconductor device manufacturing method
‌
US Patent 7538001 Transistor gate forming methods and integrated circuits
‌
US Patent 7538009 Method for fabricating STI gap fill oxide layer in semiconductor devices
‌
US Patent 7538028 Barrier layer, IC via, and IC line forming methods
‌
US Patent 7541250 Method for forming a self-aligned twin well region with simplified processing
‌
US Patent 7541279 Method for manufacturing semiconductor device
‌
US Patent 7541286 Method for manufacturing semiconductor device using KrF light source
‌
US Patent 7541295 Method of manufacturing semiconductor device
‌
US Patent 7544530 CMOS image sensor and manufacturing method thereof
‌
US Patent 7544558 Method for integrating DMOS into sub-micron CMOS process
‌
US Patent 7544603 Method of fabricating silicon nitride layer and method of fabricating semiconductor device
‌
US Patent 7544604 Tantalum lanthanide oxynitride films
‌
US Patent 7544605 Method of making a contact on a backside of a die
‌
US Patent 7544614 Method of forming a coated film, method of forming an electronic device, and method of manufacturing an electron emission element
‌
US Patent 7547621 LPCVD gate hard mask
‌
US Patent 7547645 Method for coating a structure comprising semiconductor chips
‌
US Patent 7550347 Methods of forming integrated circuit device gate structures
‌
US Patent 7550365 Bonding structure and method of making
‌
US Patent 7550822 Dual-damascene metal wiring patterns for integrated circuit devices
‌
US Patent 7553718 Methods, systems and structures for forming semiconductor structures incorporating high-temperature processing steps
‌
US Patent 7553748 Semiconductor device and method of manufacturing the same
‌
US Patent 7553754 Electronic device, method of manufacture of the same, and sputtering target
‌
US Patent 7553757 Semiconductor device and method of manufacturing the same
‌
US Patent 7553762 Method for forming metal silicide layer
‌
US Patent 7553763 Salicide process utilizing a cluster ion implantation process
‌
US Patent 7557002 Methods of forming transistor devices
‌
US Patent 7557010 Method to improve writer leakage in a SiGe bipolar device
‌
US Patent 7557025 Method of etching a dielectric layer to form a contact hole and a via hole and damascene method
‌
US Patent 7557030 Method for fabricating a recess gate in a semiconductor device
‌
US Patent 7560329 Semiconductor device and method for fabricating the same
‌
US Patent 7560335 Memory device transistors
‌
US Patent 7560360 Methods for enhancing trench capacitance and trench capacitor
‌
US Patent 7560371 Methods for selectively filling apertures in a substrate to form conductive vias with a liquid using a vacuum
‌
US Patent 7560378 Method for manufacturing semiconductor device
‌
US Patent 7560380 Chemical dissolution of barrier and adhesion layers
‌
US Patent 7563658 Method for manufacturing semiconductor device
‌
US Patent 7563717 Method for fabricating a semiconductor device
‌
US Patent 7563718 Method for forming tungsten layer of semiconductor device and method for forming tungsten wiring layer using the same
‌
US Patent 7566575 Mounting circuit and method for producing semiconductor-chip-mounting circuit
‌
US Patent 7566584 Electronic substrate manufacturing method, semiconductor device manufacturing method, and electronic equipment manufacturing method
‌
US Patent 7566611 Manufacturing method for an integrated semiconductor structure
‌
US Patent 7566644 Method for forming gate electrode of semiconductor device
‌
US Patent 7566652 Electrically inactive via for electromigration reliability improvement
‌
US Patent 7566653 Interconnect structure with grain growth promotion layer and method for forming the same
‌
US Patent 7566658 Method for fabricating a metal interconnection using a dual damascene process and resulting semiconductor device
‌
US Patent 7566664 Selective etching of MEMS using gaseous halides and reactive co-etchants
‌
US Patent 7569467 Semiconductor device and manufacturing method thereof
‌
US Patent 7569477 Method for fabricating fine pattern in semiconductor device
‌
US Patent 7569478 Method and apparatus for manufacturing semiconductor device, control program and computer storage medium
‌
US Patent 7569484 Plasma and electron beam etching device and method
‌
US Patent 7572697 Method of manufacturing flash memory device
‌
US Patent 7572719 Semiconductor device and manufacturing method thereof
‌
US Patent 7572723 Micropad for bonding and a method therefor
‌
US Patent 7575944 Method of manufacturing nitride-based semiconductor light emitting diode
‌
US Patent 7575988 Method of fabricating a hybrid substrate
‌
US Patent 7575995 Method of forming fine metal pattern and method of forming metal line using the same
‌
US Patent 7575998 Semiconductor device and metal line fabrication method of the same
‌
US Patent 7576002 Multi-step barrier deposition method
‌
US Patent 7579246 Semiconductor device manufacturing method including oblique ion implantation process and reticle pattern forming method
‌
US Patent 7579271 Method for forming low dielectric constant fluorine-doped layers
‌
US Patent 7582547 Method for junction formation in a semiconductor device and the semiconductor device made thereof
‌
US Patent 7582555 CVD flowable gap fill
‌
US Patent 7585693 Method of forming a microelectronic package using control of die and substrate differential expansions and microelectronic package formed according to the method
‌
US Patent 7585720 Dual stress liner device and method
‌
US Patent 7585758 Interconnect layers without electromigration
‌
US Patent 7585762 Vapor deposition processes for tantalum carbide nitride materials
‌
US Patent 7589009 Method for fabricating a top conductive layer in a semiconductor die and related structure
‌
US Patent 7589025 Semiconductor processing
‌
US Patent 7589377 Gate structure with low resistance for high power semiconductor devices
‌
US Patent 7592258 Metallization layer of a semiconductor device having differently thick metal lines and a method of forming the same
‌
US Patent 7592267 Method for manufacturing semiconductor silicon substrate and apparatus for manufacturing the same
‌
US Patent 7592268 Method for fabricating semiconductor device
‌
US Patent 7594085 Reclaiming data space
‌
US Patent 7595250 Semiconductor device and method of manufacturing the same
‌
US Patent 7595259 Method for manufacturing compound semiconductor substrate with pn junction
‌
US Patent 7595554 Interconnect structure with dielectric air gaps
‌
US Patent 7595556 Semiconductor device and method for manufacturing the same
‌
US Patent 7598146 Self-aligned gate and method
‌
US Patent 7598166 Dielectric layers for metal lines in semiconductor chips
‌
US Patent 7601604 Method for fabricating conducting plates for a high-Q MIM capacitor
‌
US Patent 7601607 Protruded contact and insertion of inter-layer-dielectric material to match damascene hardmask to improve undercut for low-k interconnects
‌
US Patent 7601610 Method for manufacturing a high integration density power MOS device
‌
US Patent 7608476 Electronic device
‌
US Patent 7608480 Method of fabricating a semiconductor device incorporating a semiconductor constructing body and an interconnecting layer which is connected to a ground layer via a vertical conducting portion
‌
US Patent 7608506 Body-contacted semiconductor structures and methods of fabricating such body-contacted semiconductor structures
‌
US Patent 7608515 Diffusion layer for stressed semiconductor devices
‌
US Patent 7608905 Independently addressable interdigitated nanowires
‌
US Patent 7611920 Photonic coupling scheme for photodetectors
‌
US Patent 7611925 Electronic device and method of manufacturing the same, chip carrier, circuit board, and electronic instrument
‌
US Patent 7611958 Method of making a semiconductor element
‌
US Patent 7615480 Methods of post-contact back end of the line through-hole via integration
‌
US Patent 7618887 Semiconductor device with a metal line and method of forming the same
‌
US Patent 7618891 Method for forming self-aligned metal silicide contacts
‌
US Patent 7622307 Semiconductor devices having a planarized insulating layer and methods of forming the same
‌
US Patent 7622323 Method for increasing mobility of an organic thin film transistor by application of an electric field
‌
US Patent 7622341 Sige channel epitaxial development for high-k PFET manufacturability
‌
US Patent 7625766 Methods of forming carbon nanotubes and methods of fabricating integrated circuitry
‌
US Patent 7625815 Reduced leakage interconnect structure
‌
US Patent 7629184 RFID temperature sensing wafer, system and method
‌
US Patent 7632708 Microelectronic component with photo-imageable substrate
‌
US Patent 7632709 Method of manufacturing wafer level package
‌
US Patent 7638442 Method of forming a silicon nitride layer on a gate oxide film of a semiconductor device and annealing the nitride layer
‌
US Patent 7642156 Three-dimensional flash memory cell
‌
US Patent 7645694 Development or removal of block copolymer or PMMA-b-S-based resist using polar supercritical solvent
‌
US Patent 7645696 Deposition of thin continuous PVD seed layers having improved adhesion to the barrier layer
‌
US Patent 7648904 Metal line in semiconductor device and method for forming the same
‌
US Patent 7651882 RFID tag circuit die with shielding layer to control I/O bump flow
‌
US Patent 7651887 Optical semiconductor device and method of manufacturing thereof
‌
US Patent 7652354 Semiconductor devices and methods of manufacturing semiconductor devices
‌
US Patent 7655559 Post-CMP treating liquid and manufacturing method of semiconductor device using the same
‌
US Patent 7662666 Method of processing wafer
‌
US Patent 7662711 Method of forming dual damascene pattern
‌
US Patent 7666755 Method of forming device isolation film of semiconductor device
‌
US Patent 7666787 Grain growth promotion layer for semiconductor interconnect structures
‌
US Patent 7670915 Contact liner in integrated circuit technology
‌
US Patent 7670925 Semiconductor device, method of manufacturing same, and apparatus for designing same
‌
US Patent 7670941 Method for production of semiconductor devices
‌
US Patent 7675170 Removable wafer expander for die bonding equipment
‌
US Patent 7678588 Method for constructing module for optical critical dimension (OCD) and measuring method of module for optical critical dimension using the module
‌
US Patent 7678659 Method of reducing current leakage in a metal insulator metal semiconductor capacitor and semiconductor capacitor thereof
‌
US Patent 7682847 Method for sorting integrated circuit devices
‌
US Patent 7682852 Method of manufacturing semiconductor laser device including light shield plate
‌
US Patent 7682888 Methods of forming NMOS/PMOS transistors with source/drains including strained materials
‌
US Patent 7682937 Method of treating a substrate, method of processing a substrate using a laser beam, and arrangement
‌
US Patent 7687910 Semiconductor device and method of fabricating the same
‌
US Patent 7696061 Semiconductor device and method for manufacturing same
‌
US Patent 7696086 Fabricating method of an interconnect structure
‌
US Patent 7700423 Process for manufacturing epitaxial wafers for integrated devices on a common compound semiconductor III-V wafer
‌
US Patent 7700430 Phase-changeable memory device and method of manufacturing the same
‌
US Patent 7700460 Semiconductor device fabrication method and electronic device fabrication method
‌
US Patent 7700463 Method for manufacturing semiconductor device
‌
US Patent 7704791 Packaging of integrated circuits with carbon nano-tube arrays to enhance heat dissipation through a thermal interface
‌
US Patent 7718480 ESD clamps and NMOS arrays with increased electrical overstress robustness
‌
US Patent 7718499 Method of fabricating a semiconductor device
‌
US Patent 7727835 SOI device with charging protection and methods of making same
‌
US Patent 7727838 Method to improve transistor Tox using high-angle implants with no additional masks
‌
US Patent 7732226 Method of manufacturing flash memory device
‌
US Patent 7732282 Transistor of the I-MOS type comprising two independent gates and method of using such a transistor
‌
US Patent 7732833 High-voltage semiconductor switching element
‌
US Patent 7736928 Precision printing electroplating through plating mask on a solar cell substrate
‌
US Patent 7736935 Passivation of semiconductor structures having strained layers
‌
US Patent 7741134 Inverted LED structure with improved light extraction
‌
US Patent 7741151 Integrated circuit package formation
‌
US Patent 7745231 Resistive memory cell fabrication methods and devices
‌
US Patent 7745325 Wiring structure of a semiconductor device, method of forming the wiring structure, non-volatile memory device including the wiring structure, and method of manufacturing the non-volatile memory device
‌
US Patent 7745840 Solide-state light source
‌
US Patent 7749783 Method of forming a display panel
‌
US Patent 7749789 CMOS-compatible bulk-micromachining process for single-crystal MEMS/NEMS devices
‌
US Patent 7749846 Method of forming contact structure and method of fabricating semiconductor device using the same
‌
US Patent 7750369 Nitride semiconductor device
‌
US Patent 7750400 Integrated circuit modeling, design, and fabrication based on degradation mechanisms
‌
US Patent 7754503 Method for producing semiconductor device and semiconductor producing apparatus
‌
US Patent 7754526 Method for making thin film transistor
‌
US Patent 7759205 Methods for fabricating semiconductor devices minimizing under-oxide regrowth
‌
US Patent 7759208 Low temperature ion implantation for improved silicide contacts
‌
US Patent 7759242 Method of fabricating an integrated circuit
‌
US Patent 7763530 Doping of particulate semiconductor materials
‌
US Patent 7767570 Dummy vias for damascene process
‌
US Patent 7768089 Semiconductor device
‌
US Patent 7772637 Semiconductor devices including gate structures and leakage barrier oxides
‌
US Patent 7772679 Magnetic shielding package structure of a magnetic memory device
‌
US Patent 7776636 Method for significant reduction of dislocations for a very high A1 composition A1GaN layer
‌
US Patent 7776640 Image sensing device and packaging method thereof
‌
US Patent 7776649 Method for fabricating wafer level chip scale packages
‌
US Patent 7776663 Semiconductor display devices
‌
US Patent 7777231 Thin film transistor and method for fabricating same
‌
US Patent 7781298 Methods for fabricating a capacitor
‌
US Patent 7781320 Method for fabricating a semiconductor device by considering the extinction coefficient during etching of an interlayer insulating film
‌
US Patent 7786587 Semiconductor device and method for manufacturing thereof
‌
US Patent 7790487 Method for fabricating photo sensor
‌
US Patent 7790535 Depletion-free MOS using atomic-layer doping
‌
US Patent 7790596 Apparatus and method for semiconductor wafer bumping via injection molded solder
‌
US Patent 7790604 Krypton sputtering of thin tungsten layer for integrated circuits
‌
US Patent 7790626 Plasma sputtering film deposition method and equipment
‌
US Patent 7795044 Electronically scannable multiplexing device
‌
US Patent 7795056 Semiconductor device and method of fabricating the same
‌
US Patent 7795132 Self-aligned cross-point memory fabrication
‌
US Patent 7795694 Quantum device, manufacturing method of the same and controlling method of the same
‌
US Patent RE41801 Thin-film thermoelectric device and fabrication method of same
‌
US Patent 7807482 Method for transferring wafers
‌
US Patent 7811833 Method of manufacturing a multi-purpose magnetic film structure
‌
US Patent 7811880 Fabrication of recordable electrical memory
‌
US Patent 7812355 Semiconductor device and method for manufacturing the same, liquid crystal television, and EL television
‌
US Patent 7816153 Method and apparatus for producing a dislocation-free crystalline sheet
‌
US Patent 7816155 Mounted semiconductor device and a method for making the same
‌
US Patent 7816218 Selective deposition of amorphous silicon films on metal gates
‌
US Patent 7816242 Semiconductor device and method of manufacturing the same
‌
US Patent 7816684 Light emitting display device and method of fabricating the same
‌
US Patent 7829355 Method for inspecting semiconductor device
‌
US Patent 7829384 Semiconductor device and method of laser-marking wafers with tape applied to its active surface
‌
US Patent 7829393 Copper gate electrode of liquid crystal display device and method of fabricating the same
‌
US Patent 7829457 Protection of conductors from oxidation in deposition chambers
‌
US Patent 7829915 Avalanche photodiode
‌
US Patent 7829928 Semiconductor structure of a high side driver and method for manufacturing the same
‌
US Patent 7830001 Cu-Mo substrate and method for producing same
‌
US Patent 7833872 Uniform recess of a material in a trench independent of incoming topography
‌
US Patent 7834452 Device made of single-crystal silicon
‌
US Patent 7838324 Neutron detection structure and method of fabricating
‌
US Patent 7838331 Method for dicing semiconductor substrate
‌
US Patent 7838431 Method for surface treatment of semiconductor substrates
‌
US Patent 7843002 Fully isolated high-voltage MOS device
‌
US Patent 7843009 Electrostatic discharge protection device for an integrated circuit
‌
US Patent 7846760 Doped plug for CCD gaps
‌
US Patent 7847326 Backside illuminated image sensor
‌
US Patent 7847401 Methods, systems and structures for forming semiconductor structures incorporating high-temperature processing steps
‌
US Patent 7851260 Method for manufacturing a semiconductor device
‌
US Patent 7851316 Fabrication method of semiconductor device
‌
US Patent 7851810 Method of manufacturing semiconductor light emitting device
‌
US Patent 7851916 Strain silicon wafer with a crystal orientation (100) in flip chip BGA package
‌
US Patent 7855087 Floating sheet production apparatus and method
‌
US Patent 7855089 Application specific solar cell and method for manufacture using thin film photovoltaic materials
‌
US Patent 7855098 Method of forming, modifying, or repairing a semiconductor device using field-controlled diffusion
‌
US Patent 7855118 Drive current increase in transistors by asymmetric amorphization implantation
‌
US Patent 7858405 Process condition evaluation method for liquid crystal display module
‌
US Patent 7858995 Semiconductor light emitting device
‌
US Patent 7859110 Solder resist material, wiring board using the solder resist material, and semiconductor package
‌
US Patent 7863074 Patterning electrode materials free from berm structures for thin film photovoltaic cells
‌
US Patent 7863167 Method of manufacturing group III nitride crystal
‌
US Patent 7867788 Spin-dependent tunnelling cell and method of formation thereof
‌
US Patent 7868335 Modulation doped super-lattice sub-collector for high-performance HBTs and BJTs
‌
US Patent 7871881 Method for fabrication of a capacitor, and a monolithically integrated circuit comprising such a capacitor
‌
US Patent 7872303 FinFET with longitudinal stress in a channel
‌
US Patent 7875934 Semiconductor substrate with islands of diamond and resulting devices
‌
US Patent 7883928 Image sensor and fabricating method thereof
‌
US Patent 7888150 Display and method of manufacturing the same
‌
US Patent 7888176 Stacked integrated circuit assembly
‌
US Patent 7888254 Semiconductor device having a refractory metal containing film and method for manufacturing the same
‌
US Patent 7888259 Integrated circuit package employing predetermined three-dimensional solder pad surface and method for making same
‌
US Patent 7892889 Array-processed stacked semiconductor packages
‌
US Patent 7892963 Integrated circuit packaging system and method of manufacture thereof
‌
US Patent 7893430 OLED devices
‌
US Patent 7897417 Hybrid nanocomposite semiconductor material, and method of producing inorganic semiconductor therefor
‌
US Patent 7897473 Method of manufacturing a dual contact trench capacitor
‌
US Patent 7897484 Fabricating a top conductive layer in a semiconductor die
‌
US Patent 7897490 Single crystal group III nitride articles and method of producing same by HVPE method incorporating a polycrystalline layer for yield enhancement
‌
US Patent 7898038 Method to improve writer leakage in SiGe bipolar device
‌
US Patent 7902006 Method of manufacturing a thin film transistor array substrate
‌
US Patent 7902082 Method of forming field effect transistors using diluted hydrofluoric acid to remove sacrificial nitride spacers
‌
US Patent 7902582 Tantalum lanthanide oxynitride films
‌
US Patent 7906346 Method for manufacturing a magnetic memory device and magnetic memory device
‌
US Patent 7906357 P-type layer for a III-nitride light emitting device
‌
US Patent 7906385 Method for selectively forming strain in a transistor by a stress memorization technique without adding additional lithography steps
‌
US Patent 7906394 Implanted vertical source-line under straight stack for FLASH EPROM
‌
US Patent 7906810 LDMOS device for ESD protection circuit
‌
US Patent 7910434 Method of reducing coupling between floating gates in nonvolatile memory
‌
US Patent 7910475 Method for forming low dielectric constant fluorine-doped layers
‌
US Patent 7910483 Trim process for critical dimension control for integrated circuits
‌
US Patent 7910912 Semiconductor devices having a planarized insulating layer
‌
US Patent 7915068 Method for making solar cells with sensitized quantum dots in the form of nanometer metal particles
‌
US Patent 7915082 Semiconductor device
‌
US Patent 7915139 CVD flowable gap fill
‌
US Patent 7915621 Inverted LED structure with improved light extraction
‌
US Patent 7915717 Plastic image sensor packaging for image sensors
‌
US Patent 7919343 Group III nitride crystal and method for surface treatment thereof, group III nitride stack and manufacturing method thereof, and group III nitride semiconductor device and manufacturing method thereof
‌
US Patent 7919387 Structure and method for manufacturing memory
‌
US Patent 7919841 Mounting structures for integrated circuit modules
‌
US Patent 7919845 Formation of a hybrid integrated circuit device
‌
US Patent 7923273 Stackable optoelectronics chip-to-chip interconnects and method of manufacturing
‌
US Patent 7923311 Electro-optical device and thin film transistor and method for forming the same
‌
US Patent 7923332 Method for production of semiconductor device
‌
US Patent 7923378 Film formation method and apparatus for forming silicon-containing insulating film
‌
US Patent 7927897 Photoresist composition and method of manufacturing array substrate using the same
‌
US Patent 7927921 Semiconductor die attachment method using non-conductive screen print and dispense adhesive
‌
US Patent 7927931 Liquid crystal display device and fabricating method thereof
‌
US Patent 7927952 Method of manufacturing semiconductor devices
‌
US Patent 7928575 Electronic device, method of manufacture of the same, and sputtering target
‌
US Patent 7932143 Methods for protecting gate stacks during fabrication of semiconductor devices and semiconductor devices fabricated from such methods
‌
US Patent 7932168 Method for fabricating bitline in semiconductor device
‌
US Patent 7932172 Semiconductor chip and process for forming the same
‌
US Patent 7935551 Image sensor and method for manufacturing the same
‌
US Patent 7935562 Method for annealing photovoltaic cells
‌
US Patent 7935606 Transistor manufacture
‌
US Patent 7935998 Self-aligned body contact for a semiconductor-on-insulator trench device and method of fabricating same
‌
US Patent 7936030 Methods of operating semiconductor memory devices including magnetic films having electrochemical potential difference therebetween
‌
US Patent 7939358 Semiconductor substrate, method of fabricating the same, method of fabricating semiconductor device, and method of fabricating image sensor
‌
US Patent 7939386 Image sensor applied with device isolation technique for reducing dark signals and fabrication method thereof
‌
US Patent 7939442 Strontium ruthenium oxide interface
‌
US Patent 7939918 Chip packages with covers
‌
US Patent 7943417 Method for metallization of photovoltaic cells with multiple annealing operations
‌
US Patent 7943478 Semiconductor device manufacturing method
‌
US Patent 7943518 Semiconductor chip, semiconductor mounting module, mobile communication device, and process for producing semiconductor chip
‌
US Patent 7943917 Non-volatile memory cell and fabrication method thereof
‌
US Patent 7943942 Semiconductor light-emitting device with double-sided passivation
‌
US Patent 7947521 Method for forming electrode for group-III nitride compound semiconductor light-emitting devices
‌
US Patent 7947524 Humidity control and method for thin film photovoltaic materials
‌
US Patent 7947582 Material infusion in a trap layer structure using gas cluster ion beam processing
‌
US Patent 7951682 Method for fabricating capacitor in semiconductor device
‌
US Patent 7951728 Method of improving oxide growth rate of selective oxidation processes
‌
US Patent 7952146 Grain growth promotion layer for semiconductor interconnect structures
‌
US Patent 7952377 Vertical probe array arranged to provide space transformation
‌
US Patent 7955890 Methods for forming an amorphous silicon film in display devices
‌
US Patent 7955969 Ultra thin FET
‌
US Patent 7956416 Integrated circuitry
‌
US Patent 7960189 Method of manufacturing a system in package
‌
US Patent 7960258 Method for fabricating nanoscale thermoelectric device
‌
US Patent 7960265 Method for fabricating semiconductor device
‌
US Patent 7960821 Dummy vias for damascene process
‌
US Patent 7964488 Semiconductor device and method for fabricating the same
‌
US Patent 7964907 Integrated circuit device gate structures
‌
US Patent 7968446 Metallic bump structure without under bump metallurgy and manufacturing method thereof
‌
US Patent 7968996 Integrated circuit package system with supported stacked die
‌
US Patent 7970244 Fabrication of an optical ring resonator device
‌
US Patent 7973358 Coupler structure
‌
US Patent 7981698 Removal of integrated circuits from packages
‌
US Patent 7981816 Impurity-activating thermal process method and thermal process apparatus
‌
US Patent 7982214 Voltage-operated layered arrangement
‌
US Patent 7985682 Method of fabricating semiconductor device
‌
US Patent 7985970 High voltage low current surface-emitting LED
‌
US Patent 7989252 Method for fabricating pixel cell of CMOS image sensor
‌
US Patent 7989899 Transistor, inverter including the same and methods of manufacturing transistor and inverter
‌
US Patent 7994003 Nonvolatile memory device and method of fabricating the same
‌
US Patent 7994011 Method of manufacturing nonvolatile memory device and nonvolatile memory device manufactured by the method
‌
US Patent 7994513 Silicon carbide semiconductor device including deep layer
‌
US Patent 7994541 Semiconductor device and metal line fabrication method of the same
‌
US Patent 7994554 CMOS image sensor and manufacturing method thereof
‌
US Patent 7998815 Shallow trench isolation
‌
US Patent 7999262 Thin film transistor, method of fabricating the same, and method of fabricating liquid crystal display device having the same
‌
US Patent 8003522 Method for forming trenches with wide upper portion and narrow lower portion
‌
US Patent 8003971 Integrated circuit including memory element doped with dielectric material
‌
US Patent 8004031 Memory device transistors
‌
US Patent 8004035 Dual stress liner device and method
‌
US Patent 8004082 Electronic component formed with barrier-seed layer on base material
‌
US Patent 8008164 Wafer bonding method and wafer structure
‌
US Patent 8008186 Semiconductor device and method of fabricating the same
‌
US Patent 8012782 Method for producing display device
‌
US Patent 8012785 Method of fabricating an integrated CMOS-MEMS device
‌
US Patent 8012839 Method for fabricating a semiconductor device having an epitaxial channel and transistor having same
Edits on 13 Dec, 2021
Golden AI profile picture
Golden AI
edited on 13 Dec, 2021
Golden AI profile picture
Golden AI
edited on 13 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 8012785 Method of fabricating an integrated CMOS-MEMS device
Golden AI profile picture
Golden AI
edited on 13 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 8012782 Method for producing display device
Edits on 8 Dec, 2021
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 8008164 Wafer bonding method and wafer structure
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 8008186 Semiconductor device and method of fabricating the same
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 8004082 Electronic component formed with barrier-seed layer on base material
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 8004031 Memory device transistors
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 8004035 Dual stress liner device and method
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 8003971 Integrated circuit including memory element doped with dielectric material
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 8003522 Method for forming trenches with wide upper portion and narrow lower portion
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7998815 Shallow trench isolation
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7994554 CMOS image sensor and manufacturing method thereof
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7994541 Semiconductor device and metal line fabrication method of the same
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7994513 Silicon carbide semiconductor device including deep layer
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7994003 Nonvolatile memory device and method of fabricating the same
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021

Find more people like Michael S. Lebentritt

Use the Golden Query Tool to discover related individuals, professionals, or experts with similar interests, expertise, or connections in the Knowledge Graph.
Open Query Tool
Access by API
Golden Query Tool
Golden logo