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Carl Whitehead, Jr.

founder of High Crimes

OverviewStructured DataIssuesContributorsActivity

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Edits on 23 May, 2022
"update inverses"
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Golden AI
edited on 23 May, 2022
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Founder of
High Crimes
High Crimes
Edits on 14 Dec, 2021
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Golden AI
edited on 14 Dec, 2021
Edits made to:
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Patent primary examiner of
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US Patent 7087451 Microfabricated hot wire vacuum sensor
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US Patent 7087457 Die bonding method and apparatus
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US Patent 7087484 Method for fabricating trench capacitors for integrated semiconductor memories
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US Patent 7087488 Method for fabricating a mask ROM
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US Patent 7087994 Microelectronic devices including underfill apertures
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US Patent 7091125 Method and apparatus for structuring electrodes for organic light-emitting display and organic light-emitting display manufactured using the method and apparatus
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US Patent 7091529 Three-dimensional memory array and method of fabrication
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US Patent 7091594 Leadframe type semiconductor package having reduced inductance and its manufacturing method
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US Patent 7092240 Process for production of electrode for electric double layer capacitor
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US Patent 7094442 Methods for the reduction and elimination of particulate contamination with CVD of amorphous carbon
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US Patent 7094616 High resolution cross-sectioning of polysilicon features with a dual beam tool
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US Patent 7094623 Method for producing semiconductor nanoparticles and semiconductor nanoparticles produced by the same
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US Patent 7094684 Manufacturing method of semiconductor device
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US Patent 7094705 Multi-step plasma treatment method to improve CU interconnect electrical performance
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US Patent 7094708 Method of CVD for forming silicon nitride film on substrate
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US Patent 7095044 Field effect transistors and materials and methods for their manufacture
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US Patent 7095111 Package with integrated wick layer and method for heat removal
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US Patent 7098086 Semiconductor device and method of manufacturing thereof
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US Patent 7098097 Mass-production packaging means and mass-production packaging method
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US Patent 7098546 Alignment marks with salicided spacers between bitlines for alignment signal improvement
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US Patent 7101723 Optical device, laser beam source, laser apparatus and method of producing optical device
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US Patent 7101762 Self-aligned double gate mosfet with separate gates
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US Patent 7101774 Method of manufacturing compound single crystal
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US Patent 7101780 Method for manufacturing Group-III nitride compound semiconductor device
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US Patent 7102182 Semiconductor device
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US Patent 7102186 Semiconductor device and method of manufacturing the same
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US Patent 7102200 On-die termination resistor with analog compensation
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US Patent 7102203 Semiconductor device including field-effect transistor
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US Patent 7102234 Method and structure for reduction of contact resistance of metal silicides using a metal-germanium alloy
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US Patent 7105377 Method and system for universal packaging in conjunction with a back-end integrated circuit manufacturing process
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US Patent 7105393 Strained silicon layer fabrication with reduced dislocation defect density
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US Patent 7105884 Memory circuitry with plurality of capacitors received within an insulative layer well
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US Patent 7109057 Sealing apparatus for semiconductor wafer and method of manufacturing semiconductor device by using sealing apparatus
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US Patent 7109096 Semiconductor device and method of manufacturing the same
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US Patent 7109516 Strained-semiconductor-on-insulator finFET device structures
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US Patent 7109592 SMT passive device noflow underfill methodology and structure
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US Patent 7112478 Insulated gate field effect transistor having passivated Schottky barriers to the channel
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US Patent 7112516 Fabrication of abrupt ultra-shallow junctions
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US Patent 7112523 Bumping process
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US Patent 7112542 Methods of forming materials between conductive electrical components, and insulating materials
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US Patent 7112874 Forming a multi segment integrated circuit with isolated substrates
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US Patent 7112877 High density package with wrap around interconnect
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US Patent 7112888 Solder ball assembly for bump formation and method for its manufacture
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US Patent 7115483 Stacked chip package having upper chip provided with trenches and method of manufacturing the same
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US Patent 7115490 Apparatus and method for interlocking a power supply to ion implantation equipment, method and apparatus for generating an interlocking signal, method and apparatus for interrupting an ion implantation process, and an interlocking system
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US Patent 7115507 Patterning method
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US Patent 7115895 Formation of high-mobility silicon—germanium structures by low-energy plasma enhanced chemical vapor deposition
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US Patent 7118966 Methods of forming conductive lines
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US Patent 7118991 Encapsulation wafer process
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US Patent 7119379 Semiconductor device
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US Patent 7119956 Liquid crystal display with mixed polarizers for high temperature operations
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US Patent 7122391 Wafer-level test structure for edge-emitting semiconductor lasers
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US Patent 7122394 Process for producing a semiconductor light-emitting device
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US Patent 7122403 Method of interconnecting die and substrate
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US Patent 7122472 Method for forming self-aligned dual fully silicided gates in CMOS devices
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US Patent 7122474 Method for forming barrier metal of semiconductor device
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US Patent 7122478 Method of manufacturing a semiconductor device using a polysilicon etching mask
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US Patent 7122825 Lighting system
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US Patent 7122826 Image display unit
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US Patent 7122883 Stacked semiconductor device including improved lead frame arrangement
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US Patent 7125741 Rework process of patterned photo-resist layer
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US Patent 7125789 Composite metal column for mounting semiconductor device
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US Patent 7125792 Dual damascene structure and method
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US Patent 7125802 CMP process leaving no residual oxide layer or slurry particles
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US Patent 7125805 Method of semiconductor fabrication incorporating disposable spacer into elevated source/drain processing
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US Patent 7126173 Method for enhancing the electric connection between a power electronic device and its package
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US Patent 7126216 Two part mold for wafer scale caps
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US Patent 7127319 Reducing asymmetrically deposited film induced registration error
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US Patent 7128788 Manufacturing apparatus for buried insulating layer-type semiconductor silicon carbide substrate
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US Patent 7129107 Process for producing a semiconductor light-emitting device
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US Patent 7129116 Partially patterned lead frames and methods of making and using the same in semiconductor packaging
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US Patent 7129129 Vertical device with optimal trench shape
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US Patent 7129151 Planarizing method employing hydrogenated silicon nitride planarizing stop layer
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US Patent 7129156 Method for fabricating a silicon carbide interconnect for semiconductor components using heating
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US Patent 7129514 Image display unit
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US Patent 7129515 Lighting system
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US Patent 7129562 Dual-height cell with variable width power rail architecture
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US Patent 7129578 Substrate for semiconductor device, manufacturing method thereof, semiconductor device, and frame main body
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US Patent 7132016 System for and method of manufacturing a large-area backplane by use of a small-area shadow mask
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US Patent 7132305 Method of fabricating an in-plane switching liquid crystal display device
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US Patent 7132314 System and method for forming one or more integrated circuit packages using a flexible leadframe structure
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US Patent 7132319 Transparent double-injection field-effect transistor
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US Patent 7132682 Polythiophenes and devices thereof
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US Patent 7132698 Compression assembled electronic package having a plastic molded insulation ring
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US Patent 7132729 Semiconductor device and method of manufacturing same
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US Patent 7132734 Microelectronic component assemblies and microelectronic component lead frame structures
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US Patent 7132750 Semiconductor component having conductors with wire bondable metalization layers
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US Patent 7135378 Process for fabricating a semiconductor device having a plurality of encrusted semiconductor chips
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US Patent 7135396 Method of making a semiconductor structure
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US Patent 7135709 Surface structured light-emitting diode with improved current coupling
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US Patent 7135767 Integrated circuit substrate material and method
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US Patent 7138302 Method of fabricating an integrated circuit channel region
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US Patent 7138328 Packaged IC using insulated wire
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US Patent 7138653 Structures for stabilizing semiconductor devices relative to test substrates and methods for fabricating the stabilizers
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US Patent 7141490 Method of fabricating a semiconductor device
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US Patent 7141501 Polishing method, polishing apparatus, and method of manufacturing semiconductor device
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US Patent 7141875 Flexible multi-chip module and method of making the same
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US Patent 7144775 Low-voltage single-layer polysilicon eeprom memory cell
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US Patent 7144800 Multichip packages with exposed dice
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US Patent 7145187 Substrate independent multiple input bi-directional ESD protection structure
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US Patent 7145254 Transfer-molded power device and method for manufacturing transfer-molded power device
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US Patent 7148083 Transfer mold semiconductor packaging processes
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US Patent 7148088 Memory structure and method making
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US Patent 7148089 Method for forming copper fuse links
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US Patent 7148122 Bonding of substrates
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US Patent 7148125 Method for manufacturing semiconductor power device
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US Patent 7148127 Device mounting substrate and method of repairing defective device
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US Patent 7148158 Semiconductor device and method for manufacturing the same
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US Patent 7148529 Semiconductor package
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US Patent 7151014 Underfilling process in a molded matrix array package using flow front modifying solder resist
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US Patent 7151308 Semiconductor chip package
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US Patent 7153717 Encapsulation of MEMS devices using pillar-supported caps
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US Patent 7153724 Method of fabricating no-lead package for semiconductor die with half-etched leadframe
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US Patent 7153725 Strip-fabricated flip chip in package and flip chip in system heat spreader assemblies and fabrication methods therefor
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US Patent 7153758 Anodic bonding method and electronic device having anodic bonding structure
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US Patent 7153787 CVD plasma assisted lower dielectric constant SICOH film
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US Patent 7154121 Light emitting device with a micro-reflection structure carrier
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US Patent 7157355 Method of making a semiconductor device having a strained semiconductor layer
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US Patent 7157753 Semiconductor device and method of fabricating same
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US Patent 7159599 Method and apparatus for processing a wafer
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US Patent 7160774 Method of forming polysilicon layers in non-volatile memory
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US Patent 7161172 Electroluminescent iridium compounds with fluorinated phenylpyridines, phenylpyrimidines, and phenylquinolines and devices made with such compounds
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US Patent 7161243 System and apparatus for socket and package power/ground bar to increase current carrying capacity for higher IC power delivery
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US Patent 7164169 Semiconductor device having high-permittivity insulation film and production method therefor
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US Patent 7164179 Angular-velocity sensor
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US Patent 7166491 Thermoplastic fluxing underfill composition and method
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US Patent 7166493 Package with integrated inductor and/or capacitor
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US Patent 7166522 Method of forming a relaxed semiconductor buffer layer on a substrate with a large lattice mismatch
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US Patent 7166862 Semiconductor integrated circuit
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US Patent 7169633 Solid-state image sensor for improving sensing quality and manufacturing method thereof
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US Patent 7169650 Semi-solid metal injection methods for electronic assembly thermal interface
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US Patent 7169659 Method to selectively recess ETCH regions on a wafer surface using capoly as a mask
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US Patent 7169668 Method of manufacturing a split-gate flash memory device
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US Patent 7169691 Method of fabricating wafer-level packaging with sidewall passivation and related apparatus
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US Patent 7170110 Semiconductor device and method for fabricating the same
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US Patent 7170167 Method for manufacturing wafer level chip scale package structure
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US Patent 7170184 Treatment of a ground semiconductor die to improve adhesive bonding to a substrate
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US Patent 7172909 Light emitting diode having an adhesive layer and a reflective layer and manufacturing method thereof
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US Patent 7172914 Method of making uniform oxide layer
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US Patent 7172916 Method and apparatus for vacuum-mounting a micro electro mechanical system on a substrate
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US Patent 7172921 Method and structure for forming an integrated spatial light modulator
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US Patent 7172923 Imaging device and manufacturing method for imaging device
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US Patent 7172950 Method for manufacturing semiconductor chip
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US Patent 7173285 Lithographic methods to reduce stacking fault nucleation sites
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US Patent 7173332 Placement tool for wafer scale caps
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US Patent 7176054 Method of forming a p-type group II-VI semiconductor crystal layer on a substrate
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US Patent 7176069 Manufacture method of display device
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US Patent 7179680 Method for producing an optoelectronic component
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US Patent 7179721 Method of dividing a non-metal substrate
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US Patent 7179724 Wafer processing method
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US Patent 7179733 Method of forming contact holes and electronic device formed thereby
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US Patent 7180114 Semiconductor device
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US Patent 7180175 Thermally-enhanced ball grid array package structure and method
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US Patent 7180195 Method and apparatus for improved power routing
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US Patent 7183126 Method for forming an optical interfering pattern on a surface of a metal substrate, and article having an optical interfering effect
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US Patent 7183129 Method for manufacturing CMOS image sensor using spacer etching barrier film
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US Patent 7183130 Magnetic random access memory and method of fabricating thereof
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US Patent 7183142 FinFETs with long gate length at high density
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US Patent 7183151 Method for fabricating field effect transistor
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US Patent 7183208 Methods for treating pluralities of discrete semiconductor substrates
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US Patent 7186576 Stacked die module and techniques for forming a stacked die module
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US Patent 7186581 Organic electroluminescent device, manufacturing method therefor, and electronic devices therewith
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US Patent 7186614 Method for manufacturing high density flash memory and high performance logic on a single die
‌
US Patent 7186620 Method of making substrates for nitride semiconductor devices
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US Patent 7186624 Bipolar transistor with lattice matched base layer
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US Patent 7189598 Wiring board, method of manufacturing the same, semiconductor device, and electronic instrument
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US Patent 7189599 Lead frame, semiconductor device using the same and method of producing the semiconductor device
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US Patent 7189646 Method of enhancing the adhesion between photoresist layer and substrate and bumping process
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US Patent 7190014 Vertically-stacked plate interdigital capacitor structure
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US Patent 7190017 Semiconductor device and method of manufacturing the same
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US Patent 7190040 Semiconductor device and method of manufacturing same
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US Patent 7192806 Method of establishing non-permanent electrical connection between an integrated circuit device lead element and a substrate
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US Patent 7192838 Method of producing complementary SiGe bipolar transistors
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US Patent 7193256 Manufacturing method for a semiconductor substrate comprising at least a buried cavity and devices formed with this method
‌
US Patent 7193265 Single-poly EEPROM
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US Patent 7193317 Semiconductor module and power conversion device
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US Patent 7195991 Method for producing an electromagnetic radiation-emitting semiconductor chip and a corresponding electromagnetic radiation-emitting semiconductor chip
‌
US Patent 7196019 Method of removing spacers and fabricating MOS transistor
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US Patent 7198979 Method for manufacturing a stack arrangement of a memory module
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US Patent 7198980 Methods for assembling multiple semiconductor devices
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US Patent 7198997 Method for producing semiconductor substrate, method for producing field effect transistor, semiconductor substrate, and field effect transistor
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US Patent 7199028 Method for manufacturing semiconductor device
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US Patent 7199029 Selective deposition of ZnO nanostructures on a silicon substrate using a nickel catalyst and either patterned polysilicon or silicon surface modification
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US Patent 7199035 Interconnect junction providing reduced current crowding and method of manufacturing same
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US Patent 7199440 Techniques for joining an opto-electronic module to a semiconductor package
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US Patent 7199444 Memory device, programmable resistance memory cell and memory array
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US Patent 7202105 Multi-chip semiconductor connector assembly method
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US Patent 7202157 Method for forming metallic interconnects in semiconductor devices
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US Patent 7202159 Diffusion barriers comprising a self-assembled monolayer
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US Patent 7202173 Systems and methods for electrical contacts to arrays of vertically aligned nanorods
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US Patent 7202517 Multiple gate semiconductor device and method for forming same
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US Patent 7202547 Capacitor with a dielectric including a self-organized monolayer of an organic compound
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US Patent 7202570 Circuit tape having adhesive film semiconductor device and a method for manufacturing the same
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US Patent 7205181 Method of forming hermetic wafer scale integrated circuit structure
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US Patent 7205246 Forming low k dielectric layers
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US Patent 7205635 Hermetic wafer scale integrated circuit structure
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US Patent 7208335 Castellated chip-scale packages and methods for fabricating the same
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US Patent 7208382 Semiconductor device with high conductivity region using shallow trench
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US Patent 7208395 Laser irradiation apparatus, laser irradiation method, and method for manufacturing semiconductor device
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US Patent 7208402 Method and apparatus for improved power routing
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US Patent 7211502 Method for manufacturing semiconductor device
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US Patent 7211899 Circuit substrate and method for fabricating the same
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US Patent 7214550 Method to produce thin film resistor using dry etch
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US Patent 7214561 Packaging assembly and method of assembling the same
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US Patent 7214594 Method of making semiconductor device using a novel interconnect cladding layer
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US Patent 7214599 High yield method for preparing silicon nanocrystal with chemically accessible surfaces
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US Patent 7214608 Interlevel dielectric layer and metal layer sealing
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US Patent 7217579 Voltage contrast test structure
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US Patent 7217590 Color image sensor with enhanced colorimetry and method for making same
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US Patent 7217992 Semiconductor device, semiconductor wafer, semiconductor module, and a method of manufacturing semiconductor device
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US Patent 7220598 Method of making ferroelectric thin film having a randomly oriented layer and spherical crystal conductor structure
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US Patent 7220613 Manufacturing method for semiconductor device
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US Patent 7220615 Alternative method used to package multimedia card by transfer molding
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US Patent 7220621 Sub-wavelength structures for reduction of reflective properties
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US Patent 7220682 Pattern and fabricating method therefor, device and fabricating method therefor, electro-optical apparatus, electronic apparatus, and method for fabricating active matrix substrate
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US Patent 7221008 Bitline direction shielding to avoid cross coupling between adjacent cells for NAND flash memory
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US Patent 7221019 Short-channel Schottky-barrier MOSFET device and manufacturing method
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US Patent 7223644 Method and apparatus for producing polycrystalline silicon film and method of manufacturing semiconductor device and thin-film transistor
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US Patent 7223677 Process for fabricating a semiconductor device having an insulating layer formed over a semiconductor substrate
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US Patent 7223999 Liquid crystal display device having a thin film transistor substrate with a multi-cell gap structure and method of manufacturing same
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US Patent 7224057 Thermal enhance package with universal heat spreader
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US Patent 7226795 Semiconductor-ferroelectric storage devices and processes for producing the same
‌
US Patent 7226803 Photodiode with ultra-shallow junction for high quantum efficiency CMOS image sensor and method of formation
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US Patent 7227228 Silicon on insulator device and method of manufacturing the same
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US Patent 7229859 Thin film device provided with coating film, liquid crystal panel and electronic device, and method for making the thin film device
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US Patent 7229913 Stitched micro-via to enhance adhesion and mechanical strength
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US Patent 7230311 Silicon substrate having an insulating layer
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US Patent 7230321 Integrated circuit package with laminated power cell having coplanar electrode
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US Patent 7232694 System and method for active array temperature sensing and cooling
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US Patent 7232708 Multi-mode integrated circuit structure
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US Patent 7232734 Radiation emitting semiconductor device and method of manufacturing such a device
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US Patent 7232759 Ammonium hydroxide treatments for semiconductor substrates
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US Patent 7233029 Optical functional film, method of forming the same, and spatial light modulator, spatial light modulator array, image forming device and flat panel display using the same
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US Patent 7233030 Device transfer method and panel
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US Patent 7235422 Device packages
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US Patent 7235493 Low-k dielectric process for multilevel interconnection using mircocavity engineering during electric circuit manufacture
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US Patent 7235496 HDPCVD process and method for improving uniformity of film thickness
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US Patent 7235812 Method of creating defect free high Ge content (>25%) SiGe-on-insulator (SGOI) substrates using wafer bonding techniques
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US Patent 7235873 Protective device for subassemblies and method for producing a protective device
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US Patent 7241648 Array substrates for use in liquid crystal displays and fabrication methods thereof
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US Patent 7241705 Methods of forming conductive contacts to source/drain regions and methods of forming local interconnects
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US Patent 7242024 Light emitting device
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US Patent 7242067 MRAM sense layer isolation
‌
US Patent 7244643 Semiconductor device and manufacturing method thereof
‌
US Patent 7244667 Method and device for the production of thin epitaxial semiconductor layers
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US Patent 7244966 Liquid crystal display device
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US Patent 7247515 Frame for semiconductor package
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US Patent 7247534 Silicon device on Si:C-OI and SGOI and method of manufacture
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US Patent 7247546 Method of forming strained silicon materials with improved thermal conductivity
‌
US Patent 7247565 Methods for fabricating a copper interconnect
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US Patent 7247886 Organic EL light emitting display device and method of manufacturing the same
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US Patent 7247924 Method of controlling grain size in a polysilicon layer and in semiconductor devices having polysilicon structures
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US Patent 7250374 System and method for processing a substrate using supercritical carbon dioxide processing
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US Patent 7250625 Polythiophenes and electronic devices generated therefrom
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US Patent 7253045 Selective P-channel V
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US Patent 7253066 MOSFET with decoupled halo before extension
‌
US Patent 7253080 Silicon-on-insulator semiconductor wafer
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US Patent 7253459 Semiconductor devices and methods of manufacture thereof
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US Patent 7253510 Ball grid array package construction with raised solder ball pads
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US Patent 7256076 Manufacturing method of liquid crystal display device
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US Patent 7256126 Pitch reduction integrating formation of memory array and peripheral circuitry
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US Patent 7259081 Process and system for laser crystallization processing of film regions on a substrate to provide substantial uniformity, and a structure of such film regions
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US Patent 7259434 Highly reliable amorphous high-k gate oxide ZrO2
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US Patent 7262074 Methods of fabricating underfilled, encapsulated semiconductor die assemblies
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US Patent 7262089 Methods of forming semiconductor structures
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US Patent 7262098 Manufacturing process of a semiconductor non-volatile memory cell
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US Patent 7262105 Semiconductor device with silicided source/drains
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US Patent 7262121 Integrated circuit and methods of redistributing bondpad locations
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US Patent 7262127 Method for Cu metallization of highly reliable dual damascene structures
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US Patent 7262480 Semiconductor device, and method and apparatus for manufacturing semiconductor device
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US Patent 7262827 Pad structure for liquid crystal display and method of manufacturing thereof
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US Patent 7263766 Insulating substrate, manufacturing method thereof, and module semiconductor device with insulating substrate
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US Patent 7264981 Flat panel display device and method of manufacturing the same
‌
US Patent 7265032 Protective layer during scribing
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US Patent 7265051 Semiconductor memory device and method of manufacturing the same
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US Patent 7265066 Method and system for increasing tensile stress in a thin film using collimated electromagnetic radiation
‌
US Patent 7265375 Optoelectonic devices having arrays of quantum-dot compound semiconductor superlattices therein
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US Patent 7271089 Barrier layer, IC via, and IC line forming methods
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US Patent 7271110 High density plasma and bias RF power process to make stable FSG with less free F and SiN with less H to enhance the FSG/SiN integration reliability
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US Patent 7273790 Method for fabricating trench capacitor with insulation collar electrically connected to substrate through buried contact, in particular, for a semiconductor memory cell
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US Patent 7273804 Internally reinforced bond pads
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US Patent 7273820 Method for fabricating semiconductor device
‌
US Patent 7274088 Flip-chip semiconductor package with lead frame as chip carrier and fabrication method thereof
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US Patent 7276723 Ultra-linear multi-channel field effect transistor
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US Patent 7276779 III-V group nitride system semiconductor substrate
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US Patent 7276783 Electronic component with a plastic package and method for production
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US Patent 7279351 Method of passivating semiconductor device
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US Patent 7279720 Large bumps for optical flip chips
‌
US Patent 7279779 Substrate assembly for stressed systems
‌
US Patent 7282388 Method of manufacturing wafer level package type FBAR device
‌
US Patent 7282733 Polythiophenes and devices thereof
‌
US Patent 7285430 Connection device and test system
‌
US Patent 7285434 Semiconductor package and method for manufacturing the same
‌
US Patent 7288479 Method for forming a barrier/seed layer for copper metallization
‌
US Patent 7288830 III-V nitride semiconductor substrate and its production method
‌
US Patent 7291508 Laser probe points
‌
US Patent 7294440 Method to selectively correct critical dimension errors in the semiconductor industry
‌
US Patent 7297565 Liquid crystal display device and fabricating method thereof
‌
US Patent 7297572 Fabrication method for electronic system modules
‌
US Patent 7298040 Wire bonding method and apparatus for integrated circuit
‌
US Patent 7300837 FinFET transistor device on SOI and method of fabrication
‌
US Patent 7300871 Method of doping a conductive layer near a via
‌
US Patent 7300891 Method and system for increasing tensile stress in a thin film using multi-frequency electromagnetic radiation
‌
US Patent 7301201 High voltage device having polysilicon region in trench and fabricating method thereof
‌
US Patent 7303949 High performance stress-enhanced MOSFETs using Si:C and SiGe epitaxial source/drain and method of manufacture
‌
US Patent 7303978 Board for mounting BGA semiconductor chip thereon, semiconductor device, and methods of fabricating such board and semiconductor device
‌
US Patent 7303979 Vapor-phase growth method, semiconductor manufacturing method and semiconductor device manufacturing method
‌
US Patent 7303989 Using zeolites to improve the mechanical strength of low-k interlayer dielectrics
‌
US Patent 7306994 Semiconductor device having a gate insulating film structure including an insulating film containing metal, silicon and oxygen and manufacturing method thereof
‌
US Patent 7307019 Method for supercritical carbon dioxide processing of fluoro-carbon films
‌
US Patent 7307315 Scalable planar DMOS transistor structure and its fabricating methods
‌
US Patent 7309882 Surface light source with photonic crystal LED
‌
US Patent RE39957 Method of making semiconductor package with heat spreader
‌
US Patent 7312124 Method of manufacturing a semiconductor device
‌
US Patent 7312160 Removing solution, cleaning method for semiconductor substrate, and process for production of semiconductor device
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US Patent RE39988 Deposition of dopant impurities and pulsed energy drive-in
‌
US Patent 7315055 Silicon-oxide-nitride-oxide-silicon (SONOS) memory devices having recessed channels
‌
US Patent 7315079 Thermally-enhanced ball grid array package structure and method
‌
US Patent 7316950 Method of fabricating a CMOS device with dual metal gate electrodes
‌
US Patent 7316962 High dielectric constant materials
‌
US Patent 7317217 Semiconductor scheme for reduced circuit area in a simplified process
‌
US Patent 7319243 Flat panel display device and method of manufacturing the same
‌
US Patent 7320897 Electroluminescence device with nanotip diodes
‌
US Patent 7320903 Apparatus for and method of packaging semiconductor devices
‌
US Patent 7323349 Self-aligned cross point resistor memory array
‌
US Patent 7323358 Method and system for sizing a load plate
‌
US Patent 7323422 Dielectric layers and methods of forming the same
‌
US Patent 7326590 Method for manufacturing ball grid array package
‌
US Patent 7326628 Thin layer transfer method utilizing co-implantation to reduce blister formation and to surface roughness
‌
US Patent 7329605 Semiconductor structure formed using a sacrificial structure
‌
US Patent 7329906 Semiconductor device and method for forming the same
‌
US Patent 7329953 Structure for reducing leakage currents and high contact resistance for embedded memory and method for making same
‌
US Patent 7335932 Planar dual-gate field effect transistors (FETs)
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US Patent 7335963 Light block for pixel arrays
‌
US Patent 7338881 Method for manufacturing semiconductor element
‌
US Patent 7338902 Epitaxial growth method and substrate for epitaxial growth
‌
US Patent 7339197 Light emitting diode and fabrication method thereof
‌
US Patent 7341880 Light emitting device processes
‌
US Patent 7341920 Method for forming a bipolar transistor device with self-aligned raised extrinsic base
‌
US Patent 7342288 Thin film transistor, liquid crystal display apparatus, manufacturing method of thin film transistor, and manufacturing method of liquid crystal display apparatus
‌
US Patent 7344903 Light emitting device processes
‌
US Patent 7344904 Method of fabricating laser diode
‌
US Patent 7344953 Process for vertically patterning substrates in semiconductor process technology by means of inconformal deposition
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US Patent 7344995 Method for preparing a structure with high aspect ratio
‌
US Patent 7348603 Anisotropic collimation devices and related methods
‌
US Patent 7348605 Organic electroluminescent display device
‌
US Patent 7348636 CMOS transistor having different PMOS and NMOS gate electrode structures and method of fabrication thereof
‌
US Patent 7348651 Pinned photodiode fabricated with shallow trench isolation
‌
US Patent 7351642 Deglaze route to compensate for film non-uniformities after STI oxide processing
‌
US Patent 7352039 Methods and apparatuses for microelectronic assembly having a material with a variable viscosity around a MEMS device
‌
US Patent 7354812 Multiple-depth STI trenches in integrated circuit fabrication
‌
US Patent 7355231 Memory circuitry with oxygen diffusion barrier layer received over a well base
‌
US Patent 7358166 Relaxed, low-defect SGOI for strained Si CMOS applications
‌
US Patent 7361542 Method of fabricating CMOS image sensor
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US Patent 7364947 Method for cutting lead terminal of package type electronic component
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US Patent 7364974 Double gate FET and fabrication process
‌
US Patent 7365442 Encapsulation of thin-film electronic devices
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US Patent 7371600 Thin-film structure and method for manufacturing the same, and acceleration sensor and method for manufacturing the same
‌
US Patent 7372147 Supporting a circuit package including a substrate having a solder column array
‌
US Patent 7375040 Etch stop layer
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US Patent 7378292 Method of fabricating semiconductor optical device
‌
US Patent 7378348 Polishing compound for insulating film for semiconductor integrated circuit and method for producing semiconductor integrated circuit
‌
US Patent 7381581 Method for manufacturing vertical cavity surface emitting laser and multiple wavelength surface emitting laser, vertical cavity surface emitting laser, multiple wavelength surface emitting laser, and optical communication system
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US Patent 7381584 CMOS image sensor and a method for fabricating the same
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US Patent 7381637 Metal spacer in single and dual damascence processing
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US Patent 7381655 Mandrel/trim alignment in SIT processing
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US Patent 7384805 Transfer mold semiconductor packaging processes
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US Patent 7384811 Method of separating semiconductor wafer, and separating apparatus using the same
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US Patent 7384847 Methods of forming DRAM arrays
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US Patent 7384862 Method for fabricating semiconductor device and display device
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US Patent 7384866 Methods of forming metal interconnections of semiconductor devices by treating a barrier metal layer
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US Patent 7385249 Transistor structure and integrated circuit
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US Patent 7387923 ISFET using PbTiO
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US Patent 7387969 Top patterned hardmask and method for patterning
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US Patent 7387974 Methods for providing gate conductors on semiconductors and semiconductors formed thereby
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US Patent 7388233 Patchwork patterned devices and related methods
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US Patent 7388244 Trench metal-insulator-metal (MIM) capacitors and method of fabricating same
‌
US Patent 7388277 Chip and wafer integration process using vertical connections
‌
US Patent 7390703 Method for through-plating field effect transistors with a self-assembled monolayer of an organic compound as gate dielectric
‌
US Patent 7390710 Protection of tunnel dielectric using epitaxial silicon
‌
US Patent 7391059 Isotropic collimation devices and related methods
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US Patent 7391061 Light emitting diode with thermal spreading layer
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US Patent 7391119 Temperature sustaining flip chip assembly process
‌
US Patent 7393709 Microlens manufacturing method
‌
US Patent 7393710 Fabrication method of multi-wavelength semiconductor laser device
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US Patent 7393770 Backside method for fabricating semiconductor components with conductive interconnects
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US Patent 7393794 Pattern formation method
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US Patent 7394129 SOI wafer and method for producing it
‌
US Patent 7396718 Technique for creating different mechanical strain in different channel regions by forming an etch stop layer stack having differently modified intrinsic stress
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US Patent 7397067 Microdisplay packaging system
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US Patent 7397110 High resistance silicon wafer and its manufacturing method
‌
US Patent 7399657 Ball grid array packages with thermally conductive containers
‌
US Patent 7399682 Wafer processing method
‌
US Patent 7402513 Method for forming interlayer insulation film
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US Patent 7405157 Methods for the electrochemical deposition of copper onto a barrier layer of a work piece
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US Patent 7405487 Method and apparatus for removing encapsulating material from a packaged microelectronic device
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US Patent 7407855 Method of producing semiconductor element and nonvolatile semiconductor memory produced by this method
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US Patent 7407864 Polysilazane perhydride solution and method of manufacturing a semiconductor device using the same
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US Patent 7408183 Low cost InGaAIN based lasers
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US Patent 7408242 Carrier with reinforced leads that are to be connected to a chip
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US Patent 7408264 SMT passive device noflow underfill methodology and structure
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US Patent 7413968 Method of manufacturing semiconductor device having gate electrodes of polymetal gate and dual-gate structure
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US Patent 7413976 Uniform passivation method for conductive features
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US Patent 7414315 Damascene structure with high moisture-resistant oxide and method for making the same
‌
US Patent 7416915 Solid-state imaging device and manufacturing method for the same
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US Patent 7416959 Silicon-on-insulator semiconductor wafer
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US Patent 7416985 Semiconductor device having a multilayer interconnection structure and fabrication method thereof
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US Patent 7422960 Method of forming gate arrays on a partial SOI substrate
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US Patent 7422985 Method for reducing dielectric overetch using a dielectric etch stop at a planar surface
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US Patent 7425474 Method of manufacturing thin film transistor, method of manufacturing electro-optical device thin film transistor, and electro-optical device
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US Patent 7425511 Methods for manufacturing shallow trench isolation layers of semiconductor devices
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US Patent 7427524 Optoelectronic device packaging assemblies and methods of making the same
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US Patent 7429506 Process of making a III-V compound semiconductor heterostructure MOSFET
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US Patent 7429509 Method for forming a semiconductor device
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US Patent 7432118 Vertical cavity surface emitting laser having a gain guide aperture interior to an oxide confinement layer
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US Patent 7432132 Integrated diamond carrier method for laser bar arrays
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US Patent 7432164 Semiconductor device comprising a transistor having a counter-doped channel region and method for forming the same
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US Patent 7432198 Semiconductor devices and methods of forming interconnection lines therein
‌
US Patent 7432565 III-V compound semiconductor heterostructure MOSFET device
‌
US Patent 7435682 Method of manufacturing semiconductor device
‌
US Patent 7435690 Method of preparing a silicon dioxide layer by high temperature oxidation on a substrate having, at least on the surface, germanium or a silicon-germanium alloy
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US Patent 7436058 Reactive solder material
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US Patent 7436273 Surface acoustic wave device and method for manufacturing the same
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US Patent 7439165 Method of fabricating tensile strained layers and compressive strain layers for a CMOS device
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US Patent 7439179 Healing detrimental bonds in deposited materials
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US Patent 7439195 Systems and methods for forming metal oxides using metal compounds containing aminosilane ligands
‌
US Patent 7439553 Liquid crystal display device
‌
US Patent 7442573 Scaffold-organized clusters and electronic devices made using such clusters
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US Patent 7443040 Aluminum cap with electroless nickel/immersion gold
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US Patent 7446023 High-density plasma hydrogenation
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US Patent 7446046 Selective polish for fabricating electronic devices
‌
US Patent 7452802 Method of forming metal wiring for high voltage element
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US Patent 7453333 Surface acoustic wave apparatus and communications equipment
‌
US Patent 7456080 Semiconductor on glass insulator made using improved ion implantation process
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US Patent 7459392 Noble metal barrier and seed layer for semiconductors
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US Patent 7462512 Floating gate field effect transistors for chemical and/or biological sensing
‌
US Patent 7462927 Pattern film forming method and pattern film forming apparatus
‌
US Patent 7465614 Method of fabricating semiconductor device and semiconductor fabricated by the same method
‌
US Patent 7465651 Integrated circuit packages with reduced stress on die and associated methods
‌
US Patent 7468290 Mechanical enhancement of dense and porous organosilicate materials by UV exposure
‌
US Patent 7468306 Method of manufacturing a semiconductor device
‌
US Patent 7470575 Process for fabricating semiconductor device
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US Patent 7470593 Method for manufacturing a cell transistor of a semiconductor memory device
‌
US Patent 7470943 High performance MOSFET comprising a stressed gate metal silicide layer and method of fabricating the same
‌
US Patent 7473995 Integrated heat spreader, heat sink or heat pipe with pre-attached phase change thermal interface material and method of making an electronic assembly
‌
US Patent 7476967 Composite carbon nanotube thermal interface device
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US Patent 7482243 Ultra-thin Si channel MOSFET using a self-aligned oxygen implant and damascene technique
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US Patent 7488634 Method for fabricating flash memory device
‌
US Patent 7491642 Electrical passivation of silicon-containing surfaces using organic layers
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US Patent 7510966 Electrically conductive line, method of forming an electrically conductive line, and method of reducing titanium silicide agglomeration in fabrication of titanium silicide over polysilicon transistor gate lines
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US Patent 7514358 Sequential deposition of tantalum nitride using a tantalum-containing precursor and a nitrogen-containing precursor
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US Patent RE41310 Methods for growing semiconductors and devices thereof the alloy semiconductor gainnas
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US Patent 7488634 Method for fabricating flash memory device
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US Patent 7482243 Ultra-thin Si channel MOSFET using a self-aligned oxygen implant and damascene technique
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US Patent 7470575 Process for fabricating semiconductor device
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US Patent 7468306 Method of manufacturing a semiconductor device
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US Patent 7468290 Mechanical enhancement of dense and porous organosilicate materials by UV exposure
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US Patent 7465651 Integrated circuit packages with reduced stress on die and associated methods
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US Patent 7462927 Pattern film forming method and pattern film forming apparatus
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US Patent 7462512 Floating gate field effect transistors for chemical and/or biological sensing
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